From: Ranjit Waghmode <ranjit.waghmode-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
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Cc: <linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
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Ranjit Waghmode
<ranjit.waghmode-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Subject: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe
Date: Wed, 26 Aug 2015 11:56:04 +0530 [thread overview]
Message-ID: <1440570367-22569-2-git-send-email-ranjit.waghmode@xilinx.com> (raw)
In-Reply-To: <1440570367-22569-1-git-send-email-ranjit.waghmode-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
To support dual parallel mode operation of ZynqMP GQSPI controller
following API's are added inside the core:
- Added API to support two chip selects:
Dual parallel mode supports two SPI flash memories operating in
parallel i.e 8 I/O lines.
Chip selects and clock are shared to both the flash devices.
So newly added API will help in enabling both the chips.
- Added API to support data stripe feature:
with data stripe enabled,
even bytes i.e. 0, 2, 4,... are transmitted on lower data bus
odd bytes i.e. 1, 3, 5,.. are transmitted on upper data bus.
Signed-off-by: Ranjit Waghmode <ranjit.waghmode-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
---
V2 Changes:
- Added error handling condition for newly added features
---
drivers/spi/spi.c | 8 ++++++++
include/linux/spi/spi.h | 11 +++++++++++
2 files changed, 19 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index cf8b91b..22e8e7f 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1828,6 +1828,14 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message)
if (list_empty(&message->transfers))
return -EINVAL;
+ /*
+ * Data stripe option is selected if and only if when
+ * two chips are enabled
+ */
+ if ((master->flags & SPI_MASTER_DATA_STRIPE)
+ && !(master->flags & SPI_MASTER_BOTH_CS))
+ return -EINVAL;
+
/* Half-duplex links include original MicroWire, and ones with
* only one data pin like SPI_3WIRE (switches direction) or where
* either MOSI or MISO is missing. They can also be caused by
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index d673072..53d3bc6 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -355,6 +355,17 @@ struct spi_master {
#define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
#define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
#define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
+ /* Controller may support data stripe feature when more than one
+ * chips are present.
+ * Setting data stripe will send data in following manner:
+ * -> even bytes i.e. 0, 2, 4,... are transmitted on lower data bus
+ * -> odd bytes i.e. 1, 3, 5,.. are transmitted on upper data bus
+ */
+#define SPI_MASTER_DATA_STRIPE BIT(7) /* support data stripe */
+ /* Controller may support more than one chip.
+ * This flag will enable that feature.
+ */
+#define SPI_MASTER_BOTH_CS BIT(8) /* enable both chips */
/* lock and mutex for SPI bus locking */
spinlock_t bus_lock_spinlock;
--
2.1.2
--
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next prev parent reply other threads:[~2015-08-26 6:26 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-26 6:26 [LINUX RFC v2 0/4] spi: add dual parallel mode support in Zynq MPSoC GQSPI controller Ranjit Waghmode
[not found] ` <1440570367-22569-1-git-send-email-ranjit.waghmode-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2015-08-26 6:26 ` Ranjit Waghmode [this message]
[not found] ` <1440570367-22569-2-git-send-email-ranjit.waghmode-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2015-09-03 12:12 ` [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe Mark Brown
[not found] ` <20150903121232.GW12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2015-09-04 12:02 ` Ranjit Abhimanyu Waghmode
2015-09-11 12:36 ` Mark Brown
[not found] ` <20150911123644.GU12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2015-09-11 16:24 ` Harini Katakam
2015-09-04 12:35 ` Martin Sperl
[not found] ` <E4C1DE94-773C-498F-9CD5-639FBEEE3139-d5rIkyn9cnPYtjvyW6yDsg@public.gmane.org>
2015-09-04 15:37 ` Mark Brown
[not found] ` <20150904153718.GO5313-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2015-09-04 15:48 ` Martin Sperl
2015-08-26 6:26 ` [LINUX RFC v2 2/4] mtd: add spi_device instance to spi_nor struct Ranjit Waghmode
2015-08-26 6:26 ` [LINUX RFC v2 3/4] spi-nor: add dual parallel mode support Ranjit Waghmode
2015-08-26 6:26 ` [LINUX RFC v2 4/4] spi: zynqmp: gqspi: add support for dual parallel mode configuration Ranjit Waghmode
2015-08-26 6:56 ` [LINUX RFC v2 0/4] spi: add dual parallel mode support in Zynq MPSoC GQSPI controller Marek Vasut
[not found] ` <201508260856.22258.marex-ynQEQJNshbs@public.gmane.org>
2015-09-02 17:12 ` Ranjit Abhimanyu Waghmode
[not found] ` <7CFCFE83B8145347A1D424EC939F1C3C014AFF00-4lKfpRxZ5enZMOc0yg5rMog+Gb3gawCHQz34XiSyOiE@public.gmane.org>
2015-09-02 18:56 ` Marek Vasut
[not found] ` <201509022056.09635.marex-ynQEQJNshbs@public.gmane.org>
2015-09-03 13:25 ` Ranjit Abhimanyu Waghmode
[not found] ` <7CFCFE83B8145347A1D424EC939F1C3C014B08B2-4lKfpRxZ5enZMOc0yg5rMog+Gb3gawCHQz34XiSyOiE@public.gmane.org>
2015-09-03 13:38 ` Marek Vasut
2015-08-26 12:19 ` Jagan Teki
[not found] ` <CAD6G_RQhWBsUTZNBB44W98Fjzw82H_D_E9nY0aDWezj729mkoA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-26 15:32 ` punnaiah choudary kalluri
[not found] ` <CAGnW=BZtsVtT+Z7gTq5jybXsHWp+RNpjc6ckk6-MXWxAS7u8Mw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-27 6:23 ` Jagan Teki
[not found] ` <CAD6G_RTCQ5Fzjgxz+-3oMDAyUTg6UFAqvpEPQzJ9maSTZ3Nc_g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-27 8:48 ` punnaiah choudary kalluri
[not found] ` <CAGnW=BZ80B_2kzZVULhZvEXFs+_GXkGbu8mii1eFp3MySvA8aA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-27 10:15 ` Jagan Teki
[not found] ` <CAD6G_RR+QnuK++KvztYo+68sb7yQqwM7qg-X7bybCYaBN+nAGQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-27 11:49 ` punnaiah choudary kalluri
2015-08-28 4:13 ` Jagan Teki
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