From: Varadarajan Narayanan <varada@codeaurora.org>
To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
andy.gross@linaro.org, david.brown@linaro.org,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-soc@vger.kernel.org
Cc: Varadarajan Narayanan <varada@codeaurora.org>,
Matthew McClintock <mmcclint@codeaurora.org>
Subject: [PATCH 13/15] spi: qup: allow multiple DMA transactions per spi xfer
Date: Fri, 16 Jun 2017 14:28:56 +0530 [thread overview]
Message-ID: <1497603538-12750-14-git-send-email-varada@codeaurora.org> (raw)
In-Reply-To: <1497603538-12750-1-git-send-email-varada@codeaurora.org>
Much like the block mode changes, we are breaking up DMA transactions
into 64K chunks so we can reset the QUP engine.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
---
drivers/spi/spi-qup.c | 104 ++++++++++++++++++++++++++++++++++++--------------
1 file changed, 76 insertions(+), 28 deletions(-)
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index adf16e4..fb8e77a 100644
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -417,50 +417,98 @@ static void spi_qup_dma_terminate(struct spi_master *master,
dmaengine_terminate_all(master->dma_rx);
}
+static u32 spi_qup_sgl_get_nents_len(struct scatterlist *sgl, u32 max,
+ u32 *nents)
+{
+ struct scatterlist *sg;
+ u32 total = 0;
+
+ *nents = 0;
+
+ for (sg = sgl; sg; sg = sg_next(sg)) {
+ unsigned int len = sg_dma_len(sg);
+
+ /* check for overflow as well as limit */
+ if (((total + len) < total) || ((total + len) > max))
+ break;
+
+ total += len;
+ (*nents)++;
+ }
+
+ return total;
+}
+
static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer,
unsigned long timeout)
{
struct spi_master *master = spi->master;
struct spi_qup *qup = spi_master_get_devdata(master);
+ struct scatterlist *tx_sgl, *rx_sgl;
int ret;
- ret = spi_qup_io_config(spi, xfer);
- if (ret)
- return ret;
+ rx_sgl = xfer->rx_sg.sgl;
+ tx_sgl = xfer->tx_sg.sgl;
- /* before issuing the descriptors, set the QUP to run */
- ret = spi_qup_set_state(qup, QUP_STATE_RUN);
- if (ret) {
- dev_warn(qup->dev, "%s(%d): cannot set RUN state\n",
- __func__, __LINE__);
- return ret;
- }
+ do {
+ u32 rx_nents, tx_nents;
+
+ if (rx_sgl)
+ qup->n_words = spi_qup_sgl_get_nents_len(rx_sgl,
+ SPI_MAX_XFER, &rx_nents) / qup->w_size;
+ if (tx_sgl)
+ qup->n_words = spi_qup_sgl_get_nents_len(tx_sgl,
+ SPI_MAX_XFER, &tx_nents) / qup->w_size;
+ if (!qup->n_words)
+ return -EIO;
- if (xfer->rx_buf) {
- ret = spi_qup_prep_sg(master, xfer->rx_sg.sgl,
- xfer->rx_sg.nents, DMA_DEV_TO_MEM,
- spi_qup_dma_done, &qup->rxc);
+ ret = spi_qup_io_config(spi, xfer);
if (ret)
return ret;
- dma_async_issue_pending(master->dma_rx);
- }
-
- if (xfer->tx_buf) {
- ret = spi_qup_prep_sg(master, xfer->tx_sg.sgl,
- xfer->tx_sg.nents, DMA_MEM_TO_DEV,
- spi_qup_dma_done, &qup->txc);
- if (ret)
+ /* before issuing the descriptors, set the QUP to run */
+ ret = spi_qup_set_state(qup, QUP_STATE_RUN);
+ if (ret) {
+ dev_warn(qup->dev, "cannot set RUN state\n");
return ret;
+ }
+ if (rx_sgl) {
+ ret = spi_qup_prep_sg(master, rx_sgl, rx_nents,
+ DMA_DEV_TO_MEM,
+ spi_qup_dma_done, &qup->rxc);
+ if (ret)
+ return ret;
+ dma_async_issue_pending(master->dma_rx);
+ }
- dma_async_issue_pending(master->dma_tx);
- }
+ if (tx_sgl) {
+ ret = spi_qup_prep_sg(master, tx_sgl, tx_nents,
+ DMA_MEM_TO_DEV,
+ spi_qup_dma_done, &qup->txc);
+ if (ret)
+ return ret;
+
+ dma_async_issue_pending(master->dma_tx);
+ }
+
+ if (rx_sgl &&
+ !wait_for_completion_timeout(&qup->rxc, timeout)) {
+ pr_emerg(" rx timed out\n");
+ return -ETIMEDOUT;
+ }
+
+ if (tx_sgl &&
+ !wait_for_completion_timeout(&qup->txc, timeout)) {
+ pr_emerg(" tx timed out\n");
+ return -ETIMEDOUT;
+ }
- if (xfer->rx_buf && !wait_for_completion_timeout(&qup->rxc, timeout))
- return -ETIMEDOUT;
+ for (; rx_sgl && rx_nents--; rx_sgl = sg_next(rx_sgl))
+ ;
+ for (; tx_sgl && tx_nents--; tx_sgl = sg_next(tx_sgl))
+ ;
- if (xfer->tx_buf && !wait_for_completion_timeout(&qup->txc, timeout))
- return -ETIMEDOUT;
+ } while (rx_sgl || tx_sgl);
return 0;
}
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2017-06-16 8:58 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-16 8:58 [PATCH 00/15] spi: qup: Fixes and add support for >64k transfers Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 01/15] spi: qup: Enable chip select support Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 02/15] spi: qup: Setup DMA mode correctly Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 03/15] spi: qup: Add completion timeout for dma mode Varadarajan Narayanan
[not found] ` <1497603538-12750-4-git-send-email-varada-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-06-18 2:17 ` kbuild test robot
2017-06-16 8:58 ` [PATCH 05/15] spi: qup: Place the QUP in run mode before DMA transactions Varadarajan Narayanan
[not found] ` <1497603538-12750-1-git-send-email-varada-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-06-16 8:58 ` [PATCH 04/15] spi: qup: Add completion timeout for fifo/block mode Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 06/15] spi: qup: Fix error handling in spi_qup_prep_sg Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 07/15] spi: qup: Fix transaction done signaling Varadarajan Narayanan
2017-06-18 2:11 ` kbuild test robot
2017-06-16 8:58 ` [PATCH 08/15] spi: qup: Do block sized read/write in block mode Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 09/15] spi: qup: refactor spi_qup_io_config into two functions Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 10/15] spi: qup: call io_config in mode specific function Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 11/15] spi: qup: allow block mode to generate multiple transactions Varadarajan Narayanan
2017-06-16 8:58 ` [PATCH 12/15] spi: qup: refactor spi_qup_prep_sg Varadarajan Narayanan
2017-06-16 8:58 ` Varadarajan Narayanan [this message]
2017-06-16 8:58 ` [PATCH 14/15] spi: qup: Ensure done detection Varadarajan Narayanan
[not found] ` <1497603538-12750-15-git-send-email-varada-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-08 11:17 ` Applied "spi: qup: Ensure done detection" to the spi tree Mark Brown
2017-06-16 8:58 ` [PATCH 15/15] spi: qup: support for qup v1 dma Varadarajan Narayanan
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