From: Mason Yang <masonccyang@mxic.com.tw>
To: broonie@kernel.org, tudor.ambarus@microchip.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
boris.brezillon@collabora.com
Cc: juliensu@mxic.com.tw, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
Mason Yang <masonccyang@mxic.com.tw>
Subject: [PATCH v2 4/5] mtd: spi-nor: macronix: Add Octal 8D-8D-8D supports for Macronix mx25uw51245g
Date: Tue, 21 Apr 2020 14:39:46 +0800 [thread overview]
Message-ID: <1587451187-6889-5-git-send-email-masonccyang@mxic.com.tw> (raw)
In-Reply-To: <1587451187-6889-1-git-send-email-masonccyang@mxic.com.tw>
Macronix mx25uw51245g is a SPI NOR that supports 1-1-1/8-8-8 mode and
JEDEC216D spec. included BFPT DWORD-18,19, 20 and xSPI profile 1.0 table.
Correct the dummy cycles for various frequency after xSPI 1.0 table parsed.
Enable mx25uw51245g to Octal 8D-8D-8D mode by writing CFG Reg2 in the
late initialization of default flash parameters spi_nor_late_init_params();
Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
---
drivers/mtd/spi-nor/macronix.c | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index ab0f963..46bcfe5 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -8,6 +8,43 @@
#include "core.h"
+#define MXIC_CR2_DUMMY_SET_ADDR 0x300
+
+/* Fixup the dummy cycles after SFDP xSPI 1.0 parsed */
+static void mx25uw51245g_post_sfdp_fixups(struct spi_nor *nor)
+{
+ struct spi_nor_flash_parameter *params = nor->params;
+ int ret;
+ u8 rdc, wdc;
+
+ ret = spi_nor_read_cr2(nor, MXIC_CR2_DUMMY_SET_ADDR, &rdc);
+ if (ret)
+ return;
+
+ /* Refer to dummy cycle and frequency table(MHz) */
+ switch (params->dummy_cycles) {
+ case 10: /* 10 dummy cycles for 104 MHz */
+ wdc = 5;
+ break;
+ case 12: /* 12 dummy cycles for 133 MHz */
+ wdc = 4;
+ break;
+ case 16: /* 16 dummy cycles for 166 MHz */
+ wdc = 2;
+ break;
+ case 20: /* 20 dummy cycles for 200 MHz */
+ default:
+ wdc = 0;
+ }
+
+ if (rdc != wdc)
+ spi_nor_write_cr2(nor, MXIC_CR2_DUMMY_SET_ADDR, &wdc);
+}
+
+static struct spi_nor_fixups mx25uw51245g_fixups = {
+ .post_sfdp = mx25uw51245g_post_sfdp_fixups,
+};
+
static int
mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
const struct sfdp_parameter_header *bfpt_header,
@@ -78,6 +115,10 @@
SPI_NOR_QUAD_READ) },
{ "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048,
SPI_NOR_QUAD_READ) },
+ { "mx25uw51245g", INFO(0xc2813a, 0, 64 * 1024, 1024,
+ SECT_4K | SPI_NOR_4B_OPCODES |
+ SPI_NOR_OCTAL_RD_WR)
+ .fixups = &mx25uw51245g_fixups },
};
static void macronix_default_init(struct spi_nor *nor)
--
1.9.1
next prev parent reply other threads:[~2020-04-21 7:09 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-21 6:39 [PATCH v2 0/5] mtd: spi-nor: Add support for Octal 8D-8D-8D mode Mason Yang
2020-04-21 6:39 ` [PATCH v2 1/5] " Mason Yang
2020-04-21 6:39 ` [PATCH v2 2/5] mtd: spi-nor: sfdp: Add support for xSPI profile 1.0 table Mason Yang
2020-04-21 6:39 ` [PATCH v2 3/5] mtd: spi-nor: Parse BFPT DWORD-18,19 and 20 for Octal 8D-8D-8D mode Mason Yang
2020-04-21 6:39 ` Mason Yang [this message]
2020-04-21 6:39 ` [PATCH v2 5/5] spi: mxic: Patch for Octal 8D-8D-8D mode support Mason Yang
2020-04-24 15:41 ` kbuild test robot
2020-04-21 7:23 ` [PATCH v2 0/5] mtd: spi-nor: Add support for Octal 8D-8D-8D mode Boris Brezillon
2020-04-21 9:35 ` Vignesh Raghavendra
2020-04-21 12:17 ` Boris Brezillon
2020-04-27 17:55 ` Pratyush Yadav
2020-04-28 6:14 ` masonccyang
2020-04-28 6:34 ` Boris Brezillon
2020-04-28 8:35 ` Pratyush Yadav
2020-04-29 5:59 ` masonccyang
2020-04-28 8:54 ` Pratyush Yadav
2020-04-29 7:31 ` masonccyang
2020-04-29 8:37 ` Boris Brezillon
2020-04-29 18:18 ` Pratyush Yadav
2020-05-05 9:31 ` masonccyang
2020-05-05 9:44 ` Boris Brezillon
2020-05-05 10:01 ` Boris Brezillon
2020-05-06 9:40 ` Pratyush Yadav
2020-05-15 2:26 ` masonccyang
2020-05-15 6:55 ` Pratyush Yadav
2020-04-30 8:21 ` Vignesh Raghavendra
2020-05-11 3:23 ` masonccyang
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