From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Brownell Subject: Re: [PATCH 09/14] Blackfin SPI driver: Fix SPI driver to work with SPI flash ST25P16 on bf548 Date: Wed, 31 Oct 2007 12:01:28 -0700 Message-ID: <200710311201.29643.david-b@pacbell.net> References: <1193735885-8202-1-git-send-email-bryan.wu@analog.com> <200710310011.33545.david-b@pacbell.net> <8bd0f97a0710310133m7b5cbbf3j545a489c401185df@mail.gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: bryan.wu-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org, Sonic Zhang , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: "Mike Frysinger" Return-path: In-Reply-To: <8bd0f97a0710310133m7b5cbbf3j545a489c401185df-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-spi.vger.kernel.org On Wednesday 31 October 2007, Mike Frysinger wrote: > On 10/31/07, David Brownell wrote: > > (ISTR the M25P16 in $SUBJECT has two read commands, one of > > which is only usable at clock rates below 33 MHz or so, but > > most other commands can work above that speed just fine.) > > pretty much all SPI flashes have two read commands ("slow" and "fast" > as they're typically called). Not DataFlash. But many other modern flash chips do, like most of the ones handled by the m25p80 driver. As noted there in the comment about how it should switch over to use the fast read command ... > i dont think any of the linux drivers though use the "slow" > reads with any SPI flashes ... that'd be silly :) Considering the m25p80 driver started on a uClinux platform that ISTR couldn't achieve the 33+ MHz clock rates for SPI, it doesn't seem at all odd to me! And in fact, lots of Linux systems for some reason don't seem to be able to clock SPI that fast, even if a given board were laid out to handle 50+ MHz signaling there. - Dave ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/