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From: "Uwe Kleine-König" <u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
To: Daniel Mack <daniel-rDUAYElUppE@public.gmane.org>
Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org,
	Andrew Morton
	<akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org>,
	David Brownell
	<dbrownell-Rn4VEauK+AKRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH] SPI: drain MXC SPI transfer buffer when probing device
Date: Thu, 19 Nov 2009 19:49:51 +0100	[thread overview]
Message-ID: <20091119184951.GA26816@pengutronix.de> (raw)
In-Reply-To: <1258627487-7408-1-git-send-email-daniel-rDUAYElUppE@public.gmane.org>

Hello Daniel,

On Thu, Nov 19, 2009 at 11:44:47AM +0100, Daniel Mack wrote:
> On the MX31litekit, the bootloader seems to communicate with the MC13783
> PMIC chip before booting Linux. However, it does not flush all the
> buffers properly after that, which makes the imx-spi driver read
> bogus data when probing the MC13783.
> 
> Fix that by draining the SPI buffer on startup.
> 
> Signed-off-by: Daniel Mack <daniel-rDUAYElUppE@public.gmane.org>
> Cc: David Brownell <dbrownell-Rn4VEauK+AKRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
> Cc: Andrew Morton <akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org>
> Cc: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Cc: Uwe Kleine-König <u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
> ---
>  drivers/spi/spi_imx.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
> index 89c22ef..a3894fd 100644
> --- a/drivers/spi/spi_imx.c
> +++ b/drivers/spi/spi_imx.c
> @@ -42,8 +42,11 @@
>  #define MXC_CSPITXDATA		0x04
>  #define MXC_CSPICTRL		0x08
>  #define MXC_CSPIINT		0x0c
> +#define MXC_CSPISTAT		0x14
On imx27 the register at offset 0x14 is called PERIODREG ...

>  #define MXC_RESET		0x1c
>  
> +#define MXC_CSPISTAT_RR		(1 << 3)
... and bits 0..14 are called WAIT.


> +
>  /* generic defines to abstract from the different register layouts */
>  #define MXC_INT_RR	(1 << 0) /* Receive data ready interrupt */
>  #define MXC_INT_TE	(1 << 1) /* Transmit FIFO empty interrupt */
> @@ -593,6 +596,10 @@ static int __init spi_imx_probe(struct platform_device *pdev)
>  	if (!cpu_is_mx31() || !cpu_is_mx35())
>  		writel(1, spi_imx->base + MXC_RESET);
>  
> +	/* drain the buffer */
> +	while (readl(spi_imx->base + MXC_CSPISTAT) & MXC_CSPISTAT_RR)
> +		readl(spi_imx->base + MXC_CSPIRXDATA);
> +
So this needs protection by

	if (cpu_is_mx31() || cpu_is_mx35())

(note, I didn't check the mx35 reference!).

Best regards
Uwe

-- 
Pengutronix e.K.                              | Uwe Kleine-König            |
Industrial Linux Solutions                    | http://www.pengutronix.de/  |

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  parent reply	other threads:[~2009-11-19 18:49 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-11-19 10:44 [PATCH] SPI: drain MXC SPI transfer buffer when probing device Daniel Mack
     [not found] ` <1258627487-7408-1-git-send-email-daniel-rDUAYElUppE@public.gmane.org>
2009-11-19 18:49   ` Uwe Kleine-König [this message]
     [not found]     ` <20091119184951.GA26816-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2009-11-19 19:01       ` Daniel Mack
2009-11-19 19:08         ` Uwe Kleine-König

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