From: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
To: ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org
Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org,
john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
Subject: [PATCH v5 13/16] MIPS: lantiq: remove old GPHY loader code
Date: Wed, 21 Jun 2017 00:37:40 +0200 [thread overview]
Message-ID: <20170620223743.13735-14-hauke@hauke-m.de> (raw)
In-Reply-To: <20170620223743.13735-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
The GPHY loader was replaced by a new more flexible driver. Remove the
old driver.
Signed-off-by: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
---
arch/mips/lantiq/xway/Makefile | 2 -
arch/mips/lantiq/xway/reset.c | 106 -------------------------------
arch/mips/lantiq/xway/xrx200_phy_fw.c | 113 ----------------------------------
3 files changed, 221 deletions(-)
delete mode 100644 arch/mips/lantiq/xway/xrx200_phy_fw.c
diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
index a2edc538f477..6daf3149e7ca 100644
--- a/arch/mips/lantiq/xway/Makefile
+++ b/arch/mips/lantiq/xway/Makefile
@@ -1,5 +1,3 @@
obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
obj-y += vmmc.o
-
-obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index 5cb9309b0047..be5fd29de523 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -27,18 +27,6 @@
#define RCU_RST_REQ 0x0010
/* reset status register */
#define RCU_RST_STAT 0x0014
-/* vr9 gphy registers */
-#define RCU_GFS_ADD0_XRX200 0x0020
-#define RCU_GFS_ADD1_XRX200 0x0068
-/* xRX300 gphy registers */
-#define RCU_GFS_ADD0_XRX300 0x0020
-#define RCU_GFS_ADD1_XRX300 0x0058
-#define RCU_GFS_ADD2_XRX300 0x00AC
-/* xRX330 gphy registers */
-#define RCU_GFS_ADD0_XRX330 0x0020
-#define RCU_GFS_ADD1_XRX330 0x0058
-#define RCU_GFS_ADD2_XRX330 0x00AC
-#define RCU_GFS_ADD3_XRX330 0x0264
/* xbar BE flag */
#define RCU_AHB_ENDIAN 0x004C
@@ -48,15 +36,6 @@
#define RCU_RD_GPHY0_XRX200 BIT(31)
#define RCU_RD_SRST BIT(30)
#define RCU_RD_GPHY1_XRX200 BIT(29)
-/* xRX300 bits */
-#define RCU_RD_GPHY0_XRX300 BIT(31)
-#define RCU_RD_GPHY1_XRX300 BIT(29)
-#define RCU_RD_GPHY2_XRX300 BIT(28)
-/* xRX330 bits */
-#define RCU_RD_GPHY0_XRX330 BIT(31)
-#define RCU_RD_GPHY1_XRX330 BIT(29)
-#define RCU_RD_GPHY2_XRX330 BIT(28)
-#define RCU_RD_GPHY3_XRX330 BIT(10)
/* reset cause */
#define RCU_STAT_SHIFT 26
@@ -98,7 +77,6 @@
/* remapped base addr of the reset control unit */
static void __iomem *ltq_rcu_membase;
static struct device_node *ltq_rcu_np;
-static DEFINE_SPINLOCK(ltq_rcu_lock);
static void ltq_rcu_w32(uint32_t val, uint32_t reg_off)
{
@@ -110,90 +88,6 @@ static uint32_t ltq_rcu_r32(uint32_t reg_off)
return ltq_r32(ltq_rcu_membase + reg_off);
}
-static void ltq_rcu_w32_mask(uint32_t clr, uint32_t set, uint32_t reg_off)
-{
- unsigned long flags;
-
- spin_lock_irqsave(<q_rcu_lock, flags);
- ltq_rcu_w32((ltq_rcu_r32(reg_off) & ~(clr)) | (set), reg_off);
- spin_unlock_irqrestore(<q_rcu_lock, flags);
-}
-
-struct ltq_gphy_reset {
- u32 rd;
- u32 addr;
-};
-
-/* reset / boot a gphy */
-static struct ltq_gphy_reset xrx200_gphy[] = {
- {RCU_RD_GPHY0_XRX200, RCU_GFS_ADD0_XRX200},
- {RCU_RD_GPHY1_XRX200, RCU_GFS_ADD1_XRX200},
-};
-
-/* reset / boot a gphy */
-static struct ltq_gphy_reset xrx300_gphy[] = {
- {RCU_RD_GPHY0_XRX300, RCU_GFS_ADD0_XRX300},
- {RCU_RD_GPHY1_XRX300, RCU_GFS_ADD1_XRX300},
- {RCU_RD_GPHY2_XRX300, RCU_GFS_ADD2_XRX300},
-};
-
-/* reset / boot a gphy */
-static struct ltq_gphy_reset xrx330_gphy[] = {
- {RCU_RD_GPHY0_XRX330, RCU_GFS_ADD0_XRX330},
- {RCU_RD_GPHY1_XRX330, RCU_GFS_ADD1_XRX330},
- {RCU_RD_GPHY2_XRX330, RCU_GFS_ADD2_XRX330},
- {RCU_RD_GPHY3_XRX330, RCU_GFS_ADD3_XRX330},
-};
-
-static void xrx200_gphy_boot_addr(struct ltq_gphy_reset *phy_regs,
- dma_addr_t dev_addr)
-{
- ltq_rcu_w32_mask(0, phy_regs->rd, RCU_RST_REQ);
- ltq_rcu_w32(dev_addr, phy_regs->addr);
- ltq_rcu_w32_mask(phy_regs->rd, 0, RCU_RST_REQ);
-}
-
-/* reset and boot a gphy. these phys only exist on xrx200 SoC */
-int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr)
-{
- struct clk *clk;
-
- if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) {
- dev_err(dev, "this SoC has no GPHY\n");
- return -EINVAL;
- }
-
- if (of_machine_is_compatible("lantiq,vr9")) {
- clk = clk_get_sys("1f203000.rcu", "gphy");
- if (IS_ERR(clk))
- return PTR_ERR(clk);
- clk_enable(clk);
- }
-
- dev_info(dev, "booting GPHY%u firmware at %X\n", id, dev_addr);
-
- if (of_machine_is_compatible("lantiq,vr9")) {
- if (id >= ARRAY_SIZE(xrx200_gphy)) {
- dev_err(dev, "%u is an invalid gphy id\n", id);
- return -EINVAL;
- }
- xrx200_gphy_boot_addr(&xrx200_gphy[id], dev_addr);
- } else if (of_machine_is_compatible("lantiq,ar10")) {
- if (id >= ARRAY_SIZE(xrx300_gphy)) {
- dev_err(dev, "%u is an invalid gphy id\n", id);
- return -EINVAL;
- }
- xrx200_gphy_boot_addr(&xrx300_gphy[id], dev_addr);
- } else if (of_machine_is_compatible("lantiq,grx390")) {
- if (id >= ARRAY_SIZE(xrx330_gphy)) {
- dev_err(dev, "%u is an invalid gphy id\n", id);
- return -EINVAL;
- }
- xrx200_gphy_boot_addr(&xrx330_gphy[id], dev_addr);
- }
- return 0;
-}
-
static void ltq_machine_restart(char *command)
{
u32 val = ltq_rcu_r32(RCU_RST_REQ);
diff --git a/arch/mips/lantiq/xway/xrx200_phy_fw.c b/arch/mips/lantiq/xway/xrx200_phy_fw.c
deleted file mode 100644
index f0a0f2d431b2..000000000000
--- a/arch/mips/lantiq/xway/xrx200_phy_fw.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Lantiq XRX200 PHY Firmware Loader
- * Author: John Crispin
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- * Copyright (C) 2012 John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>
- */
-
-#include <linux/delay.h>
-#include <linux/dma-mapping.h>
-#include <linux/firmware.h>
-#include <linux/of_platform.h>
-
-#include <lantiq_soc.h>
-
-#define XRX200_GPHY_FW_ALIGN (16 * 1024)
-
-static dma_addr_t xway_gphy_load(struct platform_device *pdev)
-{
- const struct firmware *fw;
- dma_addr_t dev_addr = 0;
- const char *fw_name;
- void *fw_addr;
- size_t size;
-
- if (of_get_property(pdev->dev.of_node, "firmware1", NULL) ||
- of_get_property(pdev->dev.of_node, "firmware2", NULL)) {
- switch (ltq_soc_type()) {
- case SOC_TYPE_VR9:
- if (of_property_read_string(pdev->dev.of_node,
- "firmware1", &fw_name)) {
- dev_err(&pdev->dev,
- "failed to load firmware filename\n");
- return 0;
- }
- break;
- case SOC_TYPE_VR9_2:
- if (of_property_read_string(pdev->dev.of_node,
- "firmware2", &fw_name)) {
- dev_err(&pdev->dev,
- "failed to load firmware filename\n");
- return 0;
- }
- break;
- }
- } else if (of_property_read_string(pdev->dev.of_node,
- "firmware", &fw_name)) {
- dev_err(&pdev->dev, "failed to load firmware filename\n");
- return 0;
- }
-
- dev_info(&pdev->dev, "requesting %s\n", fw_name);
- if (request_firmware(&fw, fw_name, &pdev->dev)) {
- dev_err(&pdev->dev, "failed to load firmware: %s\n", fw_name);
- return 0;
- }
-
- /*
- * GPHY cores need the firmware code in a persistent and contiguous
- * memory area with a 16 kB boundary aligned start address
- */
- size = fw->size + XRX200_GPHY_FW_ALIGN;
-
- fw_addr = dma_alloc_coherent(&pdev->dev, size, &dev_addr, GFP_KERNEL);
- if (fw_addr) {
- fw_addr = PTR_ALIGN(fw_addr, XRX200_GPHY_FW_ALIGN);
- dev_addr = ALIGN(dev_addr, XRX200_GPHY_FW_ALIGN);
- memcpy(fw_addr, fw->data, fw->size);
- } else {
- dev_err(&pdev->dev, "failed to alloc firmware memory\n");
- }
-
- release_firmware(fw);
- return dev_addr;
-}
-
-static int xway_phy_fw_probe(struct platform_device *pdev)
-{
- dma_addr_t fw_addr;
- struct property *pp;
- unsigned char *phyids;
- int i, ret = 0;
-
- fw_addr = xway_gphy_load(pdev);
- if (!fw_addr)
- return -EINVAL;
- pp = of_find_property(pdev->dev.of_node, "phys", NULL);
- if (!pp)
- return -ENOENT;
- phyids = pp->value;
- for (i = 0; i < pp->length && !ret; i++)
- ret = xrx200_gphy_boot(&pdev->dev, phyids[i], fw_addr);
- if (!ret)
- mdelay(100);
- return ret;
-}
-
-static const struct of_device_id xway_phy_match[] = {
- { .compatible = "lantiq,phy-xrx200" },
- {},
-};
-
-static struct platform_driver xway_phy_driver = {
- .probe = xway_phy_fw_probe,
- .driver = {
- .name = "phy-xrx200",
- .of_match_table = xway_phy_match,
- },
-};
-builtin_platform_driver(xway_phy_driver);
--
2.11.0
--
To unsubscribe from this list: send the line "unsubscribe linux-spi" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2017-06-20 22:37 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-20 22:37 [PATCH v5 00/16] MIPS: lantiq: handle RCU register by separate drivers Hauke Mehrtens
[not found] ` <20170620223743.13735-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-06-20 22:37 ` [PATCH v5 01/16] MIPS: lantiq: Use of_platform_default_populate instead of __dt_register_buses Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 02/16] mtd: lantiq-flash: drop check of boot select Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 03/16] mtd: spi-falcon: " Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 04/16] watchdog: lantiq: access boot cause register through regmap Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 05/16] watchdog: lantiq: add device tree binding documentation Hauke Mehrtens
[not found] ` <20170620223743.13735-6-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-06-23 22:05 ` Rob Herring
2017-06-20 22:37 ` [PATCH v5 06/16] MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 07/16] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings Hauke Mehrtens
[not found] ` <20170620223743.13735-8-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-06-23 22:12 ` Rob Herring
2017-06-29 20:27 ` Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 08/16] MIPS: lantiq: Convert the fpi bus driver to a platform_driver Hauke Mehrtens
[not found] ` <20170620223743.13735-9-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-06-23 22:15 ` Rob Herring
2017-06-20 22:37 ` [PATCH v5 09/16] MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 10/16] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 11/16] MIPS: lantiq: remove old reset controller implementation Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 12/16] MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd Hauke Mehrtens
[not found] ` <20170620223743.13735-13-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-06-23 22:17 ` Rob Herring
2017-06-20 22:37 ` Hauke Mehrtens [this message]
2017-06-20 22:37 ` [PATCH v5 14/16] phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 15/16] MIPS: lantiq: remove old USB PHY initialisation Hauke Mehrtens
2017-06-20 22:37 ` [PATCH v5 16/16] MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation Hauke Mehrtens
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170620223743.13735-14-hauke@hauke-m.de \
--to=hauke-5/s+jyg5szeelga04laivw@public.gmane.org \
--cc=andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
--cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org \
--cc=john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org \
--cc=linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \
--cc=linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org \
--cc=p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org \
--cc=ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \
--cc=robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).