From mboxrd@z Thu Jan 1 00:00:00 1970 From: Subject: [PATCH v4 09/13] dt-bindings: spi: atmel-quadspi: update example to new clock binding Date: Mon, 4 Feb 2019 10:09:56 +0000 Message-ID: <20190204100910.26701-10-tudor.ambarus@microchip.com> References: <20190204100910.26701-1-tudor.ambarus@microchip.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: , , , , , To: , , , , , , , , Return-path: In-Reply-To: <20190204100910.26701-1-tudor.ambarus@microchip.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-spi.vger.kernel.org From: Tudor Ambarus Introduced in: commit b60557876849 ("ARM: dts: at91: sama5d2: switch to new clock binding"= ) Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon --- v4: no change v3: new patch Documentation/devicetree/bindings/spi/atmel-quadspi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt b/Docu= mentation/devicetree/bindings/spi/atmel-quadspi.txt index b93c1e2f25dd..e9dae6264d89 100644 --- a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt +++ b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt @@ -19,7 +19,7 @@ spi@f0020000 { reg =3D <0xf0020000 0x100>, <0xd0000000 0x8000000>; reg-names =3D "qspi_base", "qspi_mmap"; interrupts =3D <52 IRQ_TYPE_LEVEL_HIGH 7>; - clocks =3D <&spi0_clk>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 52>; #address-cells =3D <1>; #size-cells =3D <0>; pinctrl-names =3D "default"; --=20 2.9.5