From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Brown Subject: Applied "dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings" to the spi tree Date: Tue, 12 Feb 2019 14:22:34 +0000 (GMT) Message-ID: <20190212142234.0AAEB1128113@debutante.sirena.org.uk> References: <1548658158-5460-3-git-send-email-masonccyang@mxic.com.tw> Cc: Mark Brown , broonie@kernel.org, marek.vasut@gmail.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, bbrezillon@kernel.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , sergei.shtylyov@cogentembedded.com, juliensu@mxic.com.tw, Simon Horman , zhengxunli@mxic.com.tw, linux-spi@vger.kernel.org To: Mason Yang Return-path: In-Reply-To: <1548658158-5460-3-git-send-email-masonccyang@mxic.com.tw> Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-spi.vger.kernel.org The patch dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >>From 06938aef3e9f33760ea384dc74c0f16d6b98b5a0 Mon Sep 17 00:00:00 2001 From: Mason Yang Date: Mon, 28 Jan 2019 14:49:18 +0800 Subject: [PATCH] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. Signed-off-by: Mason Yang Signed-off-by: Mark Brown --- .../bindings/spi/spi-renesas-rpc.txt | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt new file mode 100644 index 000000000000..7dff7e7bea97 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt @@ -0,0 +1,40 @@ +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings +-------------------------------------------------------------------- + +Required properties: +- compatible: should be an SoC-specific compatible value, followed by + "renesas,rcar-gen3-rpc" as a fallback. + supported SoC-specific values are: + "renesas,r8a77995-rpc" (R-Car D3) +- reg: should contain three register areas: + first for the base address of rpc-if registers, + second for the direct mapping read mode and + third for the write buffer area. +- reg-names: should contain "regs", "dirmap" and "wbuf" +- clocks: should contain 1 entries for the module's clock +- clock-names: should contain "rpc" +- #address-cells: should be 1 +- #size-cells: should be 0 + +Example: + + rpc: rpc@ee200000 { + compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc"; + reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + }; -- 2.20.1