* [PATCH v1 0/4] spi: npcm-pspi: improve preformance modify reset and fix issue
@ 2020-01-15 16:22 Tomer Maimon
[not found] ` <20200115162301.235926-1-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-01-15 16:23 ` [PATCH v1 3/4] dt-binding: spi: add NPCM PSPI reset binding Tomer Maimon
0 siblings, 2 replies; 10+ messages in thread
From: Tomer Maimon @ 2020-01-15 16:22 UTC (permalink / raw)
To: broonie, robh+dt, mark.rutland, avifishman70, tali.perry1,
venture, yuenn, benjaminfair
Cc: linux-spi, devicetree, linux-kernel, openbmc, Tomer Maimon
This patch set modify Perphiral SPI NPCM driver as follow:
- Improve transfer performance.
- Fix 16 bit send and receive support.
- Modify dt-binding documentation to support reset controller driver.
- Modify reset support to use reset controller driver
NPCM reset driver: https://lkml.org/lkml/2019/11/7/429.
Tomer Maimon (4):
spi: npcm-pspi: fix 16 bit send and receive support
spi: npcm-pspi: improve spi transfer performance
dt-binding: spi: add NPCM PSPI reset binding
spi: npcm-pspi: modify reset support
.../bindings/spi/nuvoton,npcm-pspi.txt | 12 +---
drivers/spi/spi-npcm-pspi.c | 57 +++++++++----------
2 files changed, 29 insertions(+), 40 deletions(-)
--
2.22.0
^ permalink raw reply [flat|nested] 10+ messages in thread[parent not found: <20200115162301.235926-1-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* [PATCH v1 1/4] spi: npcm-pspi: fix 16 bit send and receive support [not found] ` <20200115162301.235926-1-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-01-15 16:22 ` Tomer Maimon [not found] ` <20200115162301.235926-2-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-01-15 16:22 ` [PATCH v1 2/4] spi: npcm-pspi: improve spi transfer performance Tomer Maimon 2020-01-15 16:23 ` [PATCH v1 4/4] spi: npcm-pspi: modify reset support Tomer Maimon 2 siblings, 1 reply; 10+ messages in thread From: Tomer Maimon @ 2020-01-15 16:22 UTC (permalink / raw) To: broonie-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8, avifishman70-Re5JQEeQqe8AvxtiuMwx3w, tali.perry1-Re5JQEeQqe8AvxtiuMwx3w, venture-hpIqsD4AKlfQT0dZR+AlfA, yuenn-hpIqsD4AKlfQT0dZR+AlfA, benjaminfair-hpIqsD4AKlfQT0dZR+AlfA Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, Tomer Maimon Fixing NPCM BMC Peripheral SPI controller 16 bit send and receive support by writing and reading the SPI data in the right order. Signed-off-by: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-npcm-pspi.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c index fe624731c74c..c74611abe2a9 100644 --- a/drivers/spi/spi-npcm-pspi.c +++ b/drivers/spi/spi-npcm-pspi.c @@ -195,6 +195,7 @@ static void npcm_pspi_setup_transfer(struct spi_device *spi, static void npcm_pspi_send(struct npcm_pspi *priv) { int wsize; + u16 val; wsize = min(bytes_per_word(priv->bits_per_word), priv->tx_bytes); priv->tx_bytes -= wsize; @@ -204,17 +205,18 @@ static void npcm_pspi_send(struct npcm_pspi *priv) switch (wsize) { case 1: - iowrite8(*priv->tx_buf, NPCM_PSPI_DATA + priv->base); + val = *priv->tx_buf++; + iowrite8(val, NPCM_PSPI_DATA + priv->base); break; case 2: - iowrite16(*priv->tx_buf, NPCM_PSPI_DATA + priv->base); + val = *priv->tx_buf++; + val = *priv->tx_buf++ | (val << 8); + iowrite16(val, NPCM_PSPI_DATA + priv->base); break; default: WARN_ON_ONCE(1); return; } - - priv->tx_buf += wsize; } static void npcm_pspi_recv(struct npcm_pspi *priv) @@ -230,18 +232,17 @@ static void npcm_pspi_recv(struct npcm_pspi *priv) switch (rsize) { case 1: - val = ioread8(priv->base + NPCM_PSPI_DATA); + *priv->rx_buf++ = ioread8(priv->base + NPCM_PSPI_DATA); break; case 2: val = ioread16(priv->base + NPCM_PSPI_DATA); + *priv->rx_buf++ = (val >> 8); + *priv->rx_buf++ = val & 0xff; break; default: WARN_ON_ONCE(1); return; } - - *priv->rx_buf = val; - priv->rx_buf += rsize; } static int npcm_pspi_transfer_one(struct spi_master *master, -- 2.22.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <20200115162301.235926-2-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Applied "spi: npcm-pspi: fix 16 bit send and receive support" to the spi tree [not found] ` <20200115162301.235926-2-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-01-17 15:44 ` Mark Brown 0 siblings, 0 replies; 10+ messages in thread From: Mark Brown @ 2020-01-17 15:44 UTC (permalink / raw) To: Tomer Maimon Cc: avifishman70-Re5JQEeQqe8AvxtiuMwx3w, benjaminfair-hpIqsD4AKlfQT0dZR+AlfA, broonie-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Mark Brown, mark.rutland-5wv7dgnIgG8, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, tali.perry1-Re5JQEeQqe8AvxtiuMwx3w, venture-hpIqsD4AKlfQT0dZR+AlfA, yuenn-hpIqsD4AKlfQT0dZR+AlfA The patch spi: npcm-pspi: fix 16 bit send and receive support has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.5 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 47416a5f27be0a0e815ef5f9f2f06618ae5e0470 Mon Sep 17 00:00:00 2001 From: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Date: Wed, 15 Jan 2020 18:22:58 +0200 Subject: [PATCH] spi: npcm-pspi: fix 16 bit send and receive support Fixing NPCM BMC Peripheral SPI controller 16 bit send and receive support by writing and reading the SPI data in the right order. Signed-off-by: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Link: https://lore.kernel.org/r/20200115162301.235926-2-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi-npcm-pspi.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c index fe624731c74c..c74611abe2a9 100644 --- a/drivers/spi/spi-npcm-pspi.c +++ b/drivers/spi/spi-npcm-pspi.c @@ -195,6 +195,7 @@ static void npcm_pspi_setup_transfer(struct spi_device *spi, static void npcm_pspi_send(struct npcm_pspi *priv) { int wsize; + u16 val; wsize = min(bytes_per_word(priv->bits_per_word), priv->tx_bytes); priv->tx_bytes -= wsize; @@ -204,17 +205,18 @@ static void npcm_pspi_send(struct npcm_pspi *priv) switch (wsize) { case 1: - iowrite8(*priv->tx_buf, NPCM_PSPI_DATA + priv->base); + val = *priv->tx_buf++; + iowrite8(val, NPCM_PSPI_DATA + priv->base); break; case 2: - iowrite16(*priv->tx_buf, NPCM_PSPI_DATA + priv->base); + val = *priv->tx_buf++; + val = *priv->tx_buf++ | (val << 8); + iowrite16(val, NPCM_PSPI_DATA + priv->base); break; default: WARN_ON_ONCE(1); return; } - - priv->tx_buf += wsize; } static void npcm_pspi_recv(struct npcm_pspi *priv) @@ -230,18 +232,17 @@ static void npcm_pspi_recv(struct npcm_pspi *priv) switch (rsize) { case 1: - val = ioread8(priv->base + NPCM_PSPI_DATA); + *priv->rx_buf++ = ioread8(priv->base + NPCM_PSPI_DATA); break; case 2: val = ioread16(priv->base + NPCM_PSPI_DATA); + *priv->rx_buf++ = (val >> 8); + *priv->rx_buf++ = val & 0xff; break; default: WARN_ON_ONCE(1); return; } - - *priv->rx_buf = val; - priv->rx_buf += rsize; } static int npcm_pspi_transfer_one(struct spi_master *master, -- 2.20.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v1 2/4] spi: npcm-pspi: improve spi transfer performance [not found] ` <20200115162301.235926-1-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-01-15 16:22 ` [PATCH v1 1/4] spi: npcm-pspi: fix 16 bit send and receive support Tomer Maimon @ 2020-01-15 16:22 ` Tomer Maimon [not found] ` <20200115162301.235926-3-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-01-15 16:23 ` [PATCH v1 4/4] spi: npcm-pspi: modify reset support Tomer Maimon 2 siblings, 1 reply; 10+ messages in thread From: Tomer Maimon @ 2020-01-15 16:22 UTC (permalink / raw) To: broonie-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8, avifishman70-Re5JQEeQqe8AvxtiuMwx3w, tali.perry1-Re5JQEeQqe8AvxtiuMwx3w, venture-hpIqsD4AKlfQT0dZR+AlfA, yuenn-hpIqsD4AKlfQT0dZR+AlfA, benjaminfair-hpIqsD4AKlfQT0dZR+AlfA Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, Tomer Maimon Improving spi 8 bit per word mode transfer performance by using 16 bit per word transfer and receive when the data length is even and larger than one. Signed-off-by: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-npcm-pspi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c index c74611abe2a9..eac7ba18b4b9 100644 --- a/drivers/spi/spi-npcm-pspi.c +++ b/drivers/spi/spi-npcm-pspi.c @@ -178,6 +178,13 @@ static void npcm_pspi_setup_transfer(struct spi_device *spi, priv->mode = spi->mode; } + /* + * If transfer is even length, and 8 bits per word transfer, + * then implement 16 bits-per-word transfer. + */ + if (priv->bits_per_word == 8 && !(t->len & 0x1)) + t->bits_per_word = 16; + if (!priv->is_save_param || priv->bits_per_word != t->bits_per_word) { npcm_pspi_set_transfer_size(priv, t->bits_per_word); priv->bits_per_word = t->bits_per_word; -- 2.22.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <20200115162301.235926-3-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Applied "spi: npcm-pspi: improve spi transfer performance" to the spi tree [not found] ` <20200115162301.235926-3-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-01-17 15:44 ` Mark Brown 0 siblings, 0 replies; 10+ messages in thread From: Mark Brown @ 2020-01-17 15:44 UTC (permalink / raw) To: Tomer Maimon Cc: avifishman70-Re5JQEeQqe8AvxtiuMwx3w, benjaminfair-hpIqsD4AKlfQT0dZR+AlfA, broonie-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Mark Brown, mark.rutland-5wv7dgnIgG8, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, tali.perry1-Re5JQEeQqe8AvxtiuMwx3w, venture-hpIqsD4AKlfQT0dZR+AlfA, yuenn-hpIqsD4AKlfQT0dZR+AlfA The patch spi: npcm-pspi: improve spi transfer performance has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.6 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From b4adf5b27d59cdefff1e6fcba99151edea65a9f7 Mon Sep 17 00:00:00 2001 From: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Date: Wed, 15 Jan 2020 18:22:59 +0200 Subject: [PATCH] spi: npcm-pspi: improve spi transfer performance Improving spi 8 bit per word mode transfer performance by using 16 bit per word transfer and receive when the data length is even and larger than one. Signed-off-by: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Link: https://lore.kernel.org/r/20200115162301.235926-3-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi-npcm-pspi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c index fe624731c74c..d224aa63dbce 100644 --- a/drivers/spi/spi-npcm-pspi.c +++ b/drivers/spi/spi-npcm-pspi.c @@ -178,6 +178,13 @@ static void npcm_pspi_setup_transfer(struct spi_device *spi, priv->mode = spi->mode; } + /* + * If transfer is even length, and 8 bits per word transfer, + * then implement 16 bits-per-word transfer. + */ + if (priv->bits_per_word == 8 && !(t->len & 0x1)) + t->bits_per_word = 16; + if (!priv->is_save_param || priv->bits_per_word != t->bits_per_word) { npcm_pspi_set_transfer_size(priv, t->bits_per_word); priv->bits_per_word = t->bits_per_word; -- 2.20.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v1 4/4] spi: npcm-pspi: modify reset support [not found] ` <20200115162301.235926-1-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-01-15 16:22 ` [PATCH v1 1/4] spi: npcm-pspi: fix 16 bit send and receive support Tomer Maimon 2020-01-15 16:22 ` [PATCH v1 2/4] spi: npcm-pspi: improve spi transfer performance Tomer Maimon @ 2020-01-15 16:23 ` Tomer Maimon [not found] ` <20200115162301.235926-5-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2 siblings, 1 reply; 10+ messages in thread From: Tomer Maimon @ 2020-01-15 16:23 UTC (permalink / raw) To: broonie-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8, avifishman70-Re5JQEeQqe8AvxtiuMwx3w, tali.perry1-Re5JQEeQqe8AvxtiuMwx3w, venture-hpIqsD4AKlfQT0dZR+AlfA, yuenn-hpIqsD4AKlfQT0dZR+AlfA, benjaminfair-hpIqsD4AKlfQT0dZR+AlfA Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, Tomer Maimon Modify NPCM perphiral SPI reset support from direct register access to reset controller support. Signed-off-by: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-npcm-pspi.c | 33 +++++++++++---------------------- 1 file changed, 11 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c index eac7ba18b4b9..87cd0233c60b 100644 --- a/drivers/spi/spi-npcm-pspi.c +++ b/drivers/spi/spi-npcm-pspi.c @@ -12,6 +12,7 @@ #include <linux/spi/spi.h> #include <linux/gpio.h> #include <linux/of_gpio.h> +#include <linux/reset.h> #include <asm/unaligned.h> @@ -20,7 +21,7 @@ struct npcm_pspi { struct completion xfer_done; - struct regmap *rst_regmap; + struct reset_control *reset; struct spi_master *master; unsigned int tx_bytes; unsigned int rx_bytes; @@ -59,12 +60,6 @@ struct npcm_pspi { #define NPCM_PSPI_MIN_CLK_DIVIDER 4 #define NPCM_PSPI_DEFAULT_CLK 25000000 -/* reset register */ -#define NPCM7XX_IPSRST2_OFFSET 0x24 - -#define NPCM7XX_PSPI1_RESET BIT(22) -#define NPCM7XX_PSPI2_RESET BIT(23) - static inline unsigned int bytes_per_word(unsigned int bits) { return bits <= 8 ? 1 : 2; @@ -293,9 +288,9 @@ static int npcm_pspi_unprepare_transfer_hardware(struct spi_master *master) static void npcm_pspi_reset_hw(struct npcm_pspi *priv) { - regmap_write(priv->rst_regmap, NPCM7XX_IPSRST2_OFFSET, - NPCM7XX_PSPI1_RESET << priv->id); - regmap_write(priv->rst_regmap, NPCM7XX_IPSRST2_OFFSET, 0x0); + reset_control_assert(priv->reset); + udelay(5); + reset_control_deassert(priv->reset); } static irqreturn_t npcm_pspi_handler(int irq, void *dev_id) @@ -359,10 +354,6 @@ static int npcm_pspi_probe(struct platform_device *pdev) if (num_cs < 0) return num_cs; - pdev->id = of_alias_get_id(np, "spi"); - if (pdev->id < 0) - pdev->id = 0; - master = spi_alloc_master(&pdev->dev, sizeof(*priv)); if (!master) return -ENOMEM; @@ -372,7 +363,6 @@ static int npcm_pspi_probe(struct platform_device *pdev) priv = spi_master_get_devdata(master); priv->master = master; priv->is_save_param = false; - priv->id = pdev->id; priv->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->base)) { @@ -397,11 +387,10 @@ static int npcm_pspi_probe(struct platform_device *pdev) goto out_disable_clk; } - priv->rst_regmap = - syscon_regmap_lookup_by_compatible("nuvoton,npcm750-rst"); - if (IS_ERR(priv->rst_regmap)) { - dev_err(&pdev->dev, "failed to find nuvoton,npcm750-rst\n"); - return PTR_ERR(priv->rst_regmap); + priv->reset = devm_reset_control_get(&pdev->dev, NULL); + if (IS_ERR(priv->reset)) { + ret = PTR_ERR(priv->reset); + goto out_disable_clk; } /* reset SPI-HW block */ @@ -422,7 +411,7 @@ static int npcm_pspi_probe(struct platform_device *pdev) master->min_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MAX_CLK_DIVIDER); master->mode_bits = SPI_CPHA | SPI_CPOL; master->dev.of_node = pdev->dev.of_node; - master->bus_num = pdev->id; + master->bus_num = -1; master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); master->transfer_one = npcm_pspi_transfer_one; master->prepare_transfer_hardware = @@ -455,7 +444,7 @@ static int npcm_pspi_probe(struct platform_device *pdev) if (ret) goto out_disable_clk; - pr_info("NPCM Peripheral SPI %d probed\n", pdev->id); + pr_info("NPCM Peripheral SPI %d probed\n", master->bus_num); return 0; -- 2.22.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <20200115162301.235926-5-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Applied "spi: npcm-pspi: modify reset support" to the spi tree [not found] ` <20200115162301.235926-5-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-01-17 15:44 ` Mark Brown 0 siblings, 0 replies; 10+ messages in thread From: Mark Brown @ 2020-01-17 15:44 UTC (permalink / raw) To: Tomer Maimon Cc: avifishman70-Re5JQEeQqe8AvxtiuMwx3w, benjaminfair-hpIqsD4AKlfQT0dZR+AlfA, broonie-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Mark Brown, mark.rutland-5wv7dgnIgG8, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, tali.perry1-Re5JQEeQqe8AvxtiuMwx3w, venture-hpIqsD4AKlfQT0dZR+AlfA, yuenn-hpIqsD4AKlfQT0dZR+AlfA The patch spi: npcm-pspi: modify reset support has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.6 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From b5df0b2ee2ee6b5bdeb55d76c17f695a1aa5388f Mon Sep 17 00:00:00 2001 From: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Date: Wed, 15 Jan 2020 18:23:01 +0200 Subject: [PATCH] spi: npcm-pspi: modify reset support Modify NPCM perphiral SPI reset support from direct register access to reset controller support. Signed-off-by: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Link: https://lore.kernel.org/r/20200115162301.235926-5-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi-npcm-pspi.c | 33 +++++++++++---------------------- 1 file changed, 11 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c index d224aa63dbce..7e9e747b5626 100644 --- a/drivers/spi/spi-npcm-pspi.c +++ b/drivers/spi/spi-npcm-pspi.c @@ -12,6 +12,7 @@ #include <linux/spi/spi.h> #include <linux/gpio.h> #include <linux/of_gpio.h> +#include <linux/reset.h> #include <asm/unaligned.h> @@ -20,7 +21,7 @@ struct npcm_pspi { struct completion xfer_done; - struct regmap *rst_regmap; + struct reset_control *reset; struct spi_master *master; unsigned int tx_bytes; unsigned int rx_bytes; @@ -59,12 +60,6 @@ struct npcm_pspi { #define NPCM_PSPI_MIN_CLK_DIVIDER 4 #define NPCM_PSPI_DEFAULT_CLK 25000000 -/* reset register */ -#define NPCM7XX_IPSRST2_OFFSET 0x24 - -#define NPCM7XX_PSPI1_RESET BIT(22) -#define NPCM7XX_PSPI2_RESET BIT(23) - static inline unsigned int bytes_per_word(unsigned int bits) { return bits <= 8 ? 1 : 2; @@ -292,9 +287,9 @@ static int npcm_pspi_unprepare_transfer_hardware(struct spi_master *master) static void npcm_pspi_reset_hw(struct npcm_pspi *priv) { - regmap_write(priv->rst_regmap, NPCM7XX_IPSRST2_OFFSET, - NPCM7XX_PSPI1_RESET << priv->id); - regmap_write(priv->rst_regmap, NPCM7XX_IPSRST2_OFFSET, 0x0); + reset_control_assert(priv->reset); + udelay(5); + reset_control_deassert(priv->reset); } static irqreturn_t npcm_pspi_handler(int irq, void *dev_id) @@ -358,10 +353,6 @@ static int npcm_pspi_probe(struct platform_device *pdev) if (num_cs < 0) return num_cs; - pdev->id = of_alias_get_id(np, "spi"); - if (pdev->id < 0) - pdev->id = 0; - master = spi_alloc_master(&pdev->dev, sizeof(*priv)); if (!master) return -ENOMEM; @@ -371,7 +362,6 @@ static int npcm_pspi_probe(struct platform_device *pdev) priv = spi_master_get_devdata(master); priv->master = master; priv->is_save_param = false; - priv->id = pdev->id; priv->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->base)) { @@ -396,11 +386,10 @@ static int npcm_pspi_probe(struct platform_device *pdev) goto out_disable_clk; } - priv->rst_regmap = - syscon_regmap_lookup_by_compatible("nuvoton,npcm750-rst"); - if (IS_ERR(priv->rst_regmap)) { - dev_err(&pdev->dev, "failed to find nuvoton,npcm750-rst\n"); - return PTR_ERR(priv->rst_regmap); + priv->reset = devm_reset_control_get(&pdev->dev, NULL); + if (IS_ERR(priv->reset)) { + ret = PTR_ERR(priv->reset); + goto out_disable_clk; } /* reset SPI-HW block */ @@ -421,7 +410,7 @@ static int npcm_pspi_probe(struct platform_device *pdev) master->min_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MAX_CLK_DIVIDER); master->mode_bits = SPI_CPHA | SPI_CPOL; master->dev.of_node = pdev->dev.of_node; - master->bus_num = pdev->id; + master->bus_num = -1; master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); master->transfer_one = npcm_pspi_transfer_one; master->prepare_transfer_hardware = @@ -454,7 +443,7 @@ static int npcm_pspi_probe(struct platform_device *pdev) if (ret) goto out_disable_clk; - pr_info("NPCM Peripheral SPI %d probed\n", pdev->id); + pr_info("NPCM Peripheral SPI %d probed\n", master->bus_num); return 0; -- 2.20.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v1 3/4] dt-binding: spi: add NPCM PSPI reset binding 2020-01-15 16:22 [PATCH v1 0/4] spi: npcm-pspi: improve preformance modify reset and fix issue Tomer Maimon [not found] ` <20200115162301.235926-1-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-01-15 16:23 ` Tomer Maimon [not found] ` <20200115162301.235926-4-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-01-23 12:36 ` Applied "dt-binding: spi: add NPCM PSPI reset binding" to the spi tree Mark Brown 1 sibling, 2 replies; 10+ messages in thread From: Tomer Maimon @ 2020-01-15 16:23 UTC (permalink / raw) To: broonie, robh+dt, mark.rutland, avifishman70, tali.perry1, venture, yuenn, benjaminfair Cc: linux-spi, devicetree, linux-kernel, openbmc, Tomer Maimon Add NPCM Peripheral SPI reset binding documentation, Removing unnecessary aliases use. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- .../devicetree/bindings/spi/nuvoton,npcm-pspi.txt | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt index 1fd9a4406a1d..b98203ca656d 100644 --- a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt +++ b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt @@ -12,6 +12,7 @@ Required properties: - clock-names: Should be "clk_apb5". - pinctrl-names : a pinctrl state named "default" must be defined. - pinctrl-0 : phandle referencing pin configuration of the device. + - resets : phandle to the reset control for this device. - cs-gpios: Specifies the gpio pins to be used for chipselects. See: Documentation/devicetree/bindings/spi/spi-bus.txt @@ -19,16 +20,6 @@ Optional properties: - clock-frequency : Input clock frequency to the PSPI block in Hz. Default is 25000000 Hz. -Aliases: -- All the SPI controller nodes should be represented in the aliases node using - the following format 'spi{n}' withe the correct numbered in "aliases" node. - -Example: - -aliases { - spi0 = &spi0; -}; - spi0: spi@f0200000 { compatible = "nuvoton,npcm750-pspi"; reg = <0xf0200000 0x1000>; @@ -39,5 +30,6 @@ spi0: spi@f0200000 { interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk NPCM7XX_CLK_APB5>; clock-names = "clk_apb5"; + resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1> cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; }; -- 2.22.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <20200115162301.235926-4-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH v1 3/4] dt-binding: spi: add NPCM PSPI reset binding [not found] ` <20200115162301.235926-4-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-01-21 23:13 ` Rob Herring 0 siblings, 0 replies; 10+ messages in thread From: Rob Herring @ 2020-01-21 23:13 UTC (permalink / raw) To: Tomer Maimon Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8, avifishman70-Re5JQEeQqe8AvxtiuMwx3w, tali.perry1-Re5JQEeQqe8AvxtiuMwx3w, venture-hpIqsD4AKlfQT0dZR+AlfA, yuenn-hpIqsD4AKlfQT0dZR+AlfA, benjaminfair-hpIqsD4AKlfQT0dZR+AlfA, linux-spi-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, Tomer Maimon On Wed, 15 Jan 2020 18:23:00 +0200, Tomer Maimon wrote: > Add NPCM Peripheral SPI reset binding documentation, > Removing unnecessary aliases use. > > Signed-off-by: Tomer Maimon <tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > --- > .../devicetree/bindings/spi/nuvoton,npcm-pspi.txt | 12 ++---------- > 1 file changed, 2 insertions(+), 10 deletions(-) > Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> ^ permalink raw reply [flat|nested] 10+ messages in thread
* Applied "dt-binding: spi: add NPCM PSPI reset binding" to the spi tree 2020-01-15 16:23 ` [PATCH v1 3/4] dt-binding: spi: add NPCM PSPI reset binding Tomer Maimon [not found] ` <20200115162301.235926-4-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-01-23 12:36 ` Mark Brown 1 sibling, 0 replies; 10+ messages in thread From: Mark Brown @ 2020-01-23 12:36 UTC (permalink / raw) To: Tomer Maimon Cc: avifishman70, benjaminfair, broonie, devicetree, linux-kernel, linux-spi, Mark Brown, mark.rutland, openbmc, robh+dt, Rob Herring, tali.perry1, venture, yuenn The patch dt-binding: spi: add NPCM PSPI reset binding has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.6 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From a5362b84bdff1def10c136e36ef2126f7f545b2c Mon Sep 17 00:00:00 2001 From: Tomer Maimon <tmaimon77@gmail.com> Date: Wed, 15 Jan 2020 18:23:00 +0200 Subject: [PATCH] dt-binding: spi: add NPCM PSPI reset binding Add NPCM Peripheral SPI reset binding documentation, Removing unnecessary aliases use. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200115162301.235926-4-tmaimon77@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org> --- .../devicetree/bindings/spi/nuvoton,npcm-pspi.txt | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt index 1fd9a4406a1d..b98203ca656d 100644 --- a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt +++ b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt @@ -12,6 +12,7 @@ Required properties: - clock-names: Should be "clk_apb5". - pinctrl-names : a pinctrl state named "default" must be defined. - pinctrl-0 : phandle referencing pin configuration of the device. + - resets : phandle to the reset control for this device. - cs-gpios: Specifies the gpio pins to be used for chipselects. See: Documentation/devicetree/bindings/spi/spi-bus.txt @@ -19,16 +20,6 @@ Optional properties: - clock-frequency : Input clock frequency to the PSPI block in Hz. Default is 25000000 Hz. -Aliases: -- All the SPI controller nodes should be represented in the aliases node using - the following format 'spi{n}' withe the correct numbered in "aliases" node. - -Example: - -aliases { - spi0 = &spi0; -}; - spi0: spi@f0200000 { compatible = "nuvoton,npcm750-pspi"; reg = <0xf0200000 0x1000>; @@ -39,5 +30,6 @@ spi0: spi@f0200000 { interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk NPCM7XX_CLK_APB5>; clock-names = "clk_apb5"; + resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1> cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; }; -- 2.20.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-01-23 12:36 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-15 16:22 [PATCH v1 0/4] spi: npcm-pspi: improve preformance modify reset and fix issue Tomer Maimon
[not found] ` <20200115162301.235926-1-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-01-15 16:22 ` [PATCH v1 1/4] spi: npcm-pspi: fix 16 bit send and receive support Tomer Maimon
[not found] ` <20200115162301.235926-2-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-01-17 15:44 ` Applied "spi: npcm-pspi: fix 16 bit send and receive support" to the spi tree Mark Brown
2020-01-15 16:22 ` [PATCH v1 2/4] spi: npcm-pspi: improve spi transfer performance Tomer Maimon
[not found] ` <20200115162301.235926-3-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-01-17 15:44 ` Applied "spi: npcm-pspi: improve spi transfer performance" to the spi tree Mark Brown
2020-01-15 16:23 ` [PATCH v1 4/4] spi: npcm-pspi: modify reset support Tomer Maimon
[not found] ` <20200115162301.235926-5-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-01-17 15:44 ` Applied "spi: npcm-pspi: modify reset support" to the spi tree Mark Brown
2020-01-15 16:23 ` [PATCH v1 3/4] dt-binding: spi: add NPCM PSPI reset binding Tomer Maimon
[not found] ` <20200115162301.235926-4-tmaimon77-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-01-21 23:13 ` Rob Herring
2020-01-23 12:36 ` Applied "dt-binding: spi: add NPCM PSPI reset binding" to the spi tree Mark Brown
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).