From: Boris Brezillon <boris.brezillon-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
To: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Geert Uytterhoeven
<geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Vignesh Raghavendra <vigneshr-l0cyMroinI0@public.gmane.org>,
Tudor Ambarus
<tudor.ambarus-UWL1GkI3JZL3oGB3hsPCZA@public.gmane.org>,
Richard Weinberger <richard-/L3Ra7n9ekc@public.gmane.org>,
Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>,
Linux Kernel Mailing List
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-spi <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
MTD Maling List
<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
Miquel Raynal
<miquel.raynal-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>,
Pratyush Yadav <p.yadav-l0cyMroinI0@public.gmane.org>
Subject: Re: [PATCH v2 01/11] dt-bindings: spi: allow expressing DTR capability
Date: Thu, 27 Feb 2020 18:06:58 +0100 [thread overview]
Message-ID: <20200227180658.58633141@collabora.com> (raw)
In-Reply-To: <20200227164425.GF4062-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
On Thu, 27 Feb 2020 16:44:25 +0000
Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Thu, Feb 27, 2020 at 05:40:31PM +0100, Geert Uytterhoeven wrote:
> > On Thu, Feb 27, 2020 at 5:28 PM Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
>
> > > It's what we do for other properties, and if this is anything like the
> > > other things adding extra wiring you can't assume that the ability to
> > > use the feature for TX implies RX.
>
> > Double Transfer Rate uses the same wire.
>
> But is it still on either the TX or RX signals?
There's no separate RX/TX pins when using xD-xD-xD modes (pins switch
from RX to TX) and I doubt DTR will ever be used on single SPI.
>
> > But as you sample at both the rising and the falling edges of the clock, this
> > makes the cpha setting meaningless for such transfers, I think ;-)
>
> Might affect what the first bit is possibly?
>
> > However, as the future may bring us QDR, perhaps this should not be a
> > boolean flag, but an integer value?
> > Cfr. spi-tx-bus-width vs. the original spi-tx-dual/spi-tx-quad proposal.
>
> > What would be a good name (as we only need one)? spi-data-phases?
>
> Sounds reasonable, apart from the increasingly vague connection with
> something that's recognizably SPI :P
Or maybe we should refrain from adding a new flag and wait a bit to see
if this DTR mode is actually used for regular SPI transfers (AKA not
spi-mem) :-).
next prev parent reply other threads:[~2020-02-27 17:06 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-26 9:36 [PATCH v2 00/11] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 01/11] dt-bindings: spi: allow expressing DTR capability Pratyush Yadav
[not found] ` <20200226093703.19765-2-p.yadav-l0cyMroinI0@public.gmane.org>
2020-02-27 16:11 ` Boris Brezillon
[not found] ` <20200227171147.32cc6fcf-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2020-02-27 16:28 ` Mark Brown
[not found] ` <20200227162842.GE4062-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-02-27 16:40 ` Geert Uytterhoeven
[not found] ` <CAMuHMdWMCDzQm0tjpybJZyHy4imbC9NqRXP5d4C0xgxQx-Pf8g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-02-27 16:44 ` Mark Brown
[not found] ` <20200227164425.GF4062-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-02-27 17:03 ` Geert Uytterhoeven
2020-03-02 9:53 ` Pratyush Yadav
2020-02-27 17:06 ` Boris Brezillon [this message]
2020-02-27 16:29 ` Geert Uytterhoeven
2020-02-28 9:46 ` Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 02/11] spi: set mode bits for "spi-rx-dtr" and "spi-tx-dtr" Pratyush Yadav
[not found] ` <20200226093703.19765-3-p.yadav-l0cyMroinI0@public.gmane.org>
2020-02-27 16:23 ` Boris Brezillon
2020-03-02 9:48 ` Pratyush Yadav
[not found] ` <20200302094829.opazalwldrdn4s7y-l0cyMroinI0@public.gmane.org>
2020-03-02 10:20 ` Boris Brezillon
2020-02-26 9:36 ` [PATCH v2 03/11] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
[not found] ` <20200226093703.19765-4-p.yadav-l0cyMroinI0@public.gmane.org>
2020-02-27 16:36 ` Boris Brezillon
2020-02-26 9:36 ` [PATCH v2 04/11] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
[not found] ` <20200226093703.19765-5-p.yadav-l0cyMroinI0@public.gmane.org>
2020-02-27 16:44 ` Boris Brezillon
2020-02-28 9:41 ` Pratyush Yadav
[not found] ` <20200226093703.19765-1-p.yadav-l0cyMroinI0@public.gmane.org>
2020-02-26 9:36 ` [PATCH v2 05/11] spi: cadence-quadspi: Add support for octal DTR flashes Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 06/11] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-02-27 16:58 ` Boris Brezillon
[not found] ` <20200227175841.51435e3f-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2020-02-28 9:36 ` Pratyush Yadav
[not found] ` <20200228093658.zc3uifqg4zruokq3-l0cyMroinI0@public.gmane.org>
2020-02-28 10:53 ` Boris Brezillon
[not found] ` <20200228115355.5033798f-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2020-02-28 12:07 ` Pratyush Yadav
[not found] ` <20200228120750.hstohetdnqja2g2p-l0cyMroinI0@public.gmane.org>
2020-02-28 13:18 ` Boris Brezillon
2020-02-26 9:37 ` [PATCH v2 09/11] mtd: spi-nor: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-02-26 9:37 ` [PATCH v2 10/11] mtd: spi-nor: enable octal DTR mode when possible Pratyush Yadav
2020-02-26 9:37 ` [PATCH v2 11/11] mtd: spi-nor: add support for Cypress Semper flash Pratyush Yadav
2020-02-26 9:36 ` [PATCH v2 07/11] mtd: spi-nor: get command opcode extension type from BFPT Pratyush Yadav
2020-02-26 9:37 ` [PATCH v2 08/11] mtd: spi-nor: parse xSPI Profile 1.0 table Pratyush Yadav
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