* [PATCH 0/6] Compatible string consolidation for NXP DSPI driver @ 2020-03-02 0:19 Vladimir Oltean 2020-03-02 0:19 ` [PATCH 1/6] doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs Vladimir Oltean ` (3 more replies) 0 siblings, 4 replies; 13+ messages in thread From: Vladimir Oltean @ 2020-03-02 0:19 UTC (permalink / raw) To: broonie-DgEjT+Ai2ygdnm+yROfE0A Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA This series makes room in the driver for differentiation between the controllers which currently operate in TCFQ mode. Most of these are actually capable of a lot more in terms of throughput. This is in preparation of a second series which will convert the remaining users of TCFQ mode altogether to XSPI mode with command cycling. Vladimir Oltean (6): doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes spi: spi-fsl-dspi: Convert the instantiations that support it to DMA .../devicetree/bindings/spi/spi-fsl-dspi.txt | 17 +- drivers/spi/spi-fsl-dspi.c | 162 +++++++++++++----- 2 files changed, 128 insertions(+), 51 deletions(-) -- 2.17.1 ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/6] doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs 2020-03-02 0:19 [PATCH 0/6] Compatible string consolidation for NXP DSPI driver Vladimir Oltean @ 2020-03-02 0:19 ` Vladimir Oltean 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs" to the spi tree Mark Brown 2020-03-02 0:19 ` [PATCH 4/6] spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode Vladimir Oltean ` (2 subsequent siblings) 3 siblings, 1 reply; 13+ messages in thread From: Vladimir Oltean @ 2020-03-02 0:19 UTC (permalink / raw) To: broonie; +Cc: linux-spi, linux-kernel From: Vladimir Oltean <vladimir.oltean@nxp.com> Make the second compatible string optional for LS1012A, LS1088A and LS2080A. Old versions of the spi-fsl-dspi.c driver still need to probe on the old, generic compatible string for these controllers (such as "fsl,ls1021a-v1.0-dspi") which provides less functionality. Document the device tree bindings for LS1043A and LS1046A, whose bindings are already in use in fsl-ls1043a.dtsi and fsl-ls1046a.dtsi. Introduce new compatible strings for LS1028A and LX2160A. There will be no second compatible string for these. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- .../devicetree/bindings/spi/spi-fsl-dspi.txt | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt index 162e024b95a0..99b94cfe1623 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt +++ b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt @@ -1,12 +1,17 @@ ARM Freescale DSPI controller Required properties: -- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi", - "fsl,ls2085a-dspi" - or - "fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi" - "fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi" - "fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi" +- compatible : must be one of: + "fsl,vf610-dspi", + "fsl,ls1021a-v1.0-dspi", + "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1028a-dspi", + "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"), + "fsl,ls2085a-dspi", + "fsl,lx2160a-dspi", - reg : Offset and length of the register set for the device - interrupts : Should contain SPI controller interrupt - clocks: from common clock binding: handle to dspi clock. -- 2.17.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Applied "spi: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs" to the spi tree 2020-03-02 0:19 ` [PATCH 1/6] doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs Vladimir Oltean @ 2020-03-04 18:29 ` Mark Brown 0 siblings, 0 replies; 13+ messages in thread From: Mark Brown @ 2020-03-04 18:29 UTC (permalink / raw) To: Vladimir Oltean; +Cc: broonie, linux-kernel, linux-spi, Mark Brown The patch spi: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 50b62071deab48c1a69c471f9a7d0c8ff9ef23eb Mon Sep 17 00:00:00 2001 From: Vladimir Oltean <vladimir.oltean@nxp.com> Date: Mon, 2 Mar 2020 02:19:53 +0200 Subject: [PATCH] spi: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs Make the second compatible string optional for LS1012A, LS1088A and LS2080A. Old versions of the spi-fsl-dspi.c driver still need to probe on the old, generic compatible string for these controllers (such as "fsl,ls1021a-v1.0-dspi") which provides less functionality. Document the device tree bindings for LS1043A and LS1046A, whose bindings are already in use in fsl-ls1043a.dtsi and fsl-ls1046a.dtsi. Introduce new compatible strings for LS1028A and LX2160A. There will be no second compatible string for these. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Message-Id: <20200302001958.11105-2-olteanv@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- .../devicetree/bindings/spi/spi-fsl-dspi.txt | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt index 162e024b95a0..99b94cfe1623 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt +++ b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt @@ -1,12 +1,17 @@ ARM Freescale DSPI controller Required properties: -- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi", - "fsl,ls2085a-dspi" - or - "fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi" - "fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi" - "fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi" +- compatible : must be one of: + "fsl,vf610-dspi", + "fsl,ls1021a-v1.0-dspi", + "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1028a-dspi", + "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), + "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"), + "fsl,ls2085a-dspi", + "fsl,lx2160a-dspi", - reg : Offset and length of the register set for the device - interrupts : Should contain SPI controller interrupt - clocks: from common clock binding: handle to dspi clock. -- 2.20.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 4/6] spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode 2020-03-02 0:19 [PATCH 0/6] Compatible string consolidation for NXP DSPI driver Vladimir Oltean 2020-03-02 0:19 ` [PATCH 1/6] doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs Vladimir Oltean @ 2020-03-02 0:19 ` Vladimir Oltean [not found] ` <20200302001958.11105-5-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-02 0:19 ` [PATCH 5/6] spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes Vladimir Oltean [not found] ` <20200302001958.11105-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 3 siblings, 1 reply; 13+ messages in thread From: Vladimir Oltean @ 2020-03-02 0:19 UTC (permalink / raw) To: broonie; +Cc: linux-spi, linux-kernel From: Vladimir Oltean <vladimir.oltean@nxp.com> XSPI allows for 2 extra features: - Command cycling (use a single TX command with more than 1 word in the TX FIFO). - Increased word size (from 16 bits to 32 bits) Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- drivers/spi/spi-fsl-dspi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 55ccb3d0f683..d21cc5cdc8a4 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -179,6 +179,7 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .xspi_mode = true, .fifo_size = 4, }, [LS2085A] = { @@ -191,6 +192,7 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .xspi_mode = true, .fifo_size = 4, }, [MCF5441X] = { -- 2.17.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <20200302001958.11105-5-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Applied "spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode" to the spi tree [not found] ` <20200302001958.11105-5-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-03-04 18:29 ` Mark Brown 0 siblings, 0 replies; 13+ messages in thread From: Mark Brown @ 2020-03-04 18:29 UTC (permalink / raw) To: Vladimir Oltean Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Mark Brown The patch spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From ca5052c8bfab7a44efd2161ce2a9d67dfc126aa6 Mon Sep 17 00:00:00 2001 From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Date: Mon, 2 Mar 2020 02:19:56 +0200 Subject: [PATCH] spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode XSPI allows for 2 extra features: - Command cycling (use a single TX command with more than 1 word in the TX FIFO). - Increased word size (from 16 bits to 32 bits) Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Message-Id: <20200302001958.11105-5-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi-fsl-dspi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 55ccb3d0f683..d21cc5cdc8a4 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -179,6 +179,7 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .xspi_mode = true, .fifo_size = 4, }, [LS2085A] = { @@ -191,6 +192,7 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .xspi_mode = true, .fifo_size = 4, }, [MCF5441X] = { -- 2.20.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 5/6] spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes 2020-03-02 0:19 [PATCH 0/6] Compatible string consolidation for NXP DSPI driver Vladimir Oltean 2020-03-02 0:19 ` [PATCH 1/6] doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs Vladimir Oltean 2020-03-02 0:19 ` [PATCH 4/6] spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode Vladimir Oltean @ 2020-03-02 0:19 ` Vladimir Oltean [not found] ` <20200302001958.11105-6-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [not found] ` <20200302001958.11105-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 3 siblings, 1 reply; 13+ messages in thread From: Vladimir Oltean @ 2020-03-02 0:19 UTC (permalink / raw) To: broonie; +Cc: linux-spi, linux-kernel From: Vladimir Oltean <vladimir.oltean@nxp.com> There's no reason to keep this .ptp_sts_supported property explicitly in devtype_data, since it can be deduced from the operating mode alone. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- drivers/spi/spi-fsl-dspi.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index d21cc5cdc8a4..c26a42f8ecbc 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -122,7 +122,6 @@ enum dspi_trans_mode { struct fsl_dspi_devtype_data { enum dspi_trans_mode trans_mode; u8 max_clock_factor; - bool ptp_sts_supported; bool xspi_mode; int fifo_size; int dma_bufsize; @@ -150,48 +149,41 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { [LS1021A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 4, }, [LS1012A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 16, }, [LS1043A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 16, }, [LS1046A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 16, }, [LS2080A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 4, }, [LS2085A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .fifo_size = 4, }, [LX2160A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 4, }, @@ -1246,7 +1238,8 @@ static int dspi_probe(struct platform_device *pdev) ctlr->max_speed_hz = clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor; - ctlr->ptp_sts_supported = dspi->devtype_data->ptp_sts_supported; + if (dspi->devtype_data->trans_mode != DSPI_DMA_MODE) + ctlr->ptp_sts_supported = true; platform_set_drvdata(pdev, ctlr); -- 2.17.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <20200302001958.11105-6-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Applied "spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes" to the spi tree [not found] ` <20200302001958.11105-6-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-03-04 18:29 ` Mark Brown 0 siblings, 0 replies; 13+ messages in thread From: Mark Brown @ 2020-03-04 18:29 UTC (permalink / raw) To: Vladimir Oltean Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Mark Brown The patch spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 63669902f74a6133c209fc03109becf5a2141284 Mon Sep 17 00:00:00 2001 From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Date: Mon, 2 Mar 2020 02:19:57 +0200 Subject: [PATCH] spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes There's no reason to keep this .ptp_sts_supported property explicitly in devtype_data, since it can be deduced from the operating mode alone. Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Message-Id: <20200302001958.11105-6-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi-fsl-dspi.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index d21cc5cdc8a4..c26a42f8ecbc 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -122,7 +122,6 @@ enum dspi_trans_mode { struct fsl_dspi_devtype_data { enum dspi_trans_mode trans_mode; u8 max_clock_factor; - bool ptp_sts_supported; bool xspi_mode; int fifo_size; int dma_bufsize; @@ -150,48 +149,41 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { [LS1021A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 4, }, [LS1012A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 16, }, [LS1043A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 16, }, [LS1046A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 16, }, [LS2080A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 4, }, [LS2085A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .fifo_size = 4, }, [LX2160A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, - .ptp_sts_supported = true, .xspi_mode = true, .fifo_size = 4, }, @@ -1246,7 +1238,8 @@ static int dspi_probe(struct platform_device *pdev) ctlr->max_speed_hz = clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor; - ctlr->ptp_sts_supported = dspi->devtype_data->ptp_sts_supported; + if (dspi->devtype_data->trans_mode != DSPI_DMA_MODE) + ctlr->ptp_sts_supported = true; platform_set_drvdata(pdev, ctlr); -- 2.20.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <20200302001958.11105-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* [PATCH 2/6] spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations [not found] ` <20200302001958.11105-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-03-02 0:19 ` Vladimir Oltean 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations" to the spi tree Mark Brown 2020-03-02 0:19 ` [PATCH 3/6] spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size Vladimir Oltean 2020-03-02 0:19 ` [PATCH 6/6] spi: spi-fsl-dspi: Convert the instantiations that support it to DMA Vladimir Oltean 2 siblings, 1 reply; 13+ messages in thread From: Vladimir Oltean @ 2020-03-02 0:19 UTC (permalink / raw) To: broonie-DgEjT+Ai2ygdnm+yROfE0A Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Currently, the device tree bindings submitted in mainline for Layerscape SoCs look like this: LS1021A: compatible = "fsl,ls1021a-v1.0-dspi"; LS1012A: compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi"; LS2085A: compatible = "fsl,ls2085a-dspi"; LS2088A: compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi"; LX2160A: compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; LS1043A: compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi"; LS1046A: compatible = "fsl,ls1021a-v1.0-dspi"; Due to a lack of a more specific compatible string, LS1012A, LS1043A and LS1046A will fall under the LS1021A umbrella, and LS2088A and LX2160A under the LS2085A umbrella. They do work in those modes, but there are slight differences in the hardware instantiations, mostly related to FIFO sizes (with the more specific compatible strings, the FIFO size can be increased properly). Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> --- drivers/spi/spi-fsl-dspi.c | 108 +++++++++++++++++++++++++++++-------- 1 file changed, 85 insertions(+), 23 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 6ec2dcb8c57a..021c658886d4 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -133,27 +133,66 @@ struct fsl_dspi_devtype_data { bool xspi_mode; }; -static const struct fsl_dspi_devtype_data vf610_data = { - .trans_mode = DSPI_DMA_MODE, - .max_clock_factor = 2, +enum { + LS1021A, + LS1012A, + LS1043A, + LS1046A, + LS2080A, + LS2085A, + LX2160A, + MCF5441X, + VF610, }; -static const struct fsl_dspi_devtype_data ls1021a_v1_data = { - .trans_mode = DSPI_TCFQ_MODE, - .max_clock_factor = 8, - .ptp_sts_supported = true, - .xspi_mode = true, -}; - -static const struct fsl_dspi_devtype_data ls2085a_data = { - .trans_mode = DSPI_TCFQ_MODE, - .max_clock_factor = 8, - .ptp_sts_supported = true, -}; - -static const struct fsl_dspi_devtype_data coldfire_data = { - .trans_mode = DSPI_EOQ_MODE, - .max_clock_factor = 8, +static const struct fsl_dspi_devtype_data devtype_data[] = { + [VF610] = { + .trans_mode = DSPI_DMA_MODE, + .max_clock_factor = 2, + }, + [LS1021A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS1012A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS1043A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS1046A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS2080A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + }, + [LS2085A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + }, + [LX2160A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + }, + [MCF5441X] = { + .trans_mode = DSPI_EOQ_MODE, + .max_clock_factor = 8, + }, }; struct fsl_dspi_dma { @@ -909,9 +948,31 @@ static void dspi_cleanup(struct spi_device *spi) } static const struct of_device_id fsl_dspi_dt_ids[] = { - { .compatible = "fsl,vf610-dspi", .data = &vf610_data, }, - { .compatible = "fsl,ls1021a-v1.0-dspi", .data = &ls1021a_v1_data, }, - { .compatible = "fsl,ls2085a-dspi", .data = &ls2085a_data, }, + { + .compatible = "fsl,vf610-dspi", + .data = &devtype_data[VF610], + }, { + .compatible = "fsl,ls1021a-v1.0-dspi", + .data = &devtype_data[LS1021A], + }, { + .compatible = "fsl,ls1012a-dspi", + .data = &devtype_data[LS1012A], + }, { + .compatible = "fsl,ls1043a-dspi", + .data = &devtype_data[LS1043A], + }, { + .compatible = "fsl,ls1046a-dspi", + .data = &devtype_data[LS1046A], + }, { + .compatible = "fsl,ls2080a-dspi", + .data = &devtype_data[LS2080A], + }, { + .compatible = "fsl,ls2085a-dspi", + .data = &devtype_data[LS2085A], + }, { + .compatible = "fsl,lx2160a-dspi", + .data = &devtype_data[LX2160A], + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_dspi_dt_ids); @@ -1064,7 +1125,8 @@ static int dspi_probe(struct platform_device *pdev) ctlr->num_chipselect = pdata->cs_num; ctlr->bus_num = pdata->bus_num; - dspi->devtype_data = &coldfire_data; + /* Only Coldfire uses platform data */ + dspi->devtype_data = &devtype_data[MCF5441X]; } else { ret = of_property_read_u32(np, "spi-num-chipselects", &cs_num); -- 2.17.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Applied "spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations" to the spi tree 2020-03-02 0:19 ` [PATCH 2/6] spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations Vladimir Oltean @ 2020-03-04 18:29 ` Mark Brown 0 siblings, 0 replies; 13+ messages in thread From: Mark Brown @ 2020-03-04 18:29 UTC (permalink / raw) To: Vladimir Oltean; +Cc: broonie, linux-kernel, linux-spi, Mark Brown The patch spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From d35054010b571486596f9da159f798fc38628683 Mon Sep 17 00:00:00 2001 From: Vladimir Oltean <vladimir.oltean@nxp.com> Date: Mon, 2 Mar 2020 02:19:54 +0200 Subject: [PATCH] spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations Currently, the device tree bindings submitted in mainline for Layerscape SoCs look like this: LS1021A: compatible = "fsl,ls1021a-v1.0-dspi"; LS1012A: compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi"; LS2085A: compatible = "fsl,ls2085a-dspi"; LS2088A: compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi"; LX2160A: compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; LS1043A: compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi"; LS1046A: compatible = "fsl,ls1021a-v1.0-dspi"; Due to a lack of a more specific compatible string, LS1012A, LS1043A and LS1046A will fall under the LS1021A umbrella, and LS2088A and LX2160A under the LS2085A umbrella. They do work in those modes, but there are slight differences in the hardware instantiations, mostly related to FIFO sizes (with the more specific compatible strings, the FIFO size can be increased properly). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Message-Id: <20200302001958.11105-3-olteanv@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-fsl-dspi.c | 108 +++++++++++++++++++++++++++++-------- 1 file changed, 85 insertions(+), 23 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 6ec2dcb8c57a..021c658886d4 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -133,27 +133,66 @@ struct fsl_dspi_devtype_data { bool xspi_mode; }; -static const struct fsl_dspi_devtype_data vf610_data = { - .trans_mode = DSPI_DMA_MODE, - .max_clock_factor = 2, +enum { + LS1021A, + LS1012A, + LS1043A, + LS1046A, + LS2080A, + LS2085A, + LX2160A, + MCF5441X, + VF610, }; -static const struct fsl_dspi_devtype_data ls1021a_v1_data = { - .trans_mode = DSPI_TCFQ_MODE, - .max_clock_factor = 8, - .ptp_sts_supported = true, - .xspi_mode = true, -}; - -static const struct fsl_dspi_devtype_data ls2085a_data = { - .trans_mode = DSPI_TCFQ_MODE, - .max_clock_factor = 8, - .ptp_sts_supported = true, -}; - -static const struct fsl_dspi_devtype_data coldfire_data = { - .trans_mode = DSPI_EOQ_MODE, - .max_clock_factor = 8, +static const struct fsl_dspi_devtype_data devtype_data[] = { + [VF610] = { + .trans_mode = DSPI_DMA_MODE, + .max_clock_factor = 2, + }, + [LS1021A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS1012A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS1043A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS1046A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + .xspi_mode = true, + }, + [LS2080A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + }, + [LS2085A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + }, + [LX2160A] = { + .trans_mode = DSPI_TCFQ_MODE, + .max_clock_factor = 8, + .ptp_sts_supported = true, + }, + [MCF5441X] = { + .trans_mode = DSPI_EOQ_MODE, + .max_clock_factor = 8, + }, }; struct fsl_dspi_dma { @@ -909,9 +948,31 @@ static void dspi_cleanup(struct spi_device *spi) } static const struct of_device_id fsl_dspi_dt_ids[] = { - { .compatible = "fsl,vf610-dspi", .data = &vf610_data, }, - { .compatible = "fsl,ls1021a-v1.0-dspi", .data = &ls1021a_v1_data, }, - { .compatible = "fsl,ls2085a-dspi", .data = &ls2085a_data, }, + { + .compatible = "fsl,vf610-dspi", + .data = &devtype_data[VF610], + }, { + .compatible = "fsl,ls1021a-v1.0-dspi", + .data = &devtype_data[LS1021A], + }, { + .compatible = "fsl,ls1012a-dspi", + .data = &devtype_data[LS1012A], + }, { + .compatible = "fsl,ls1043a-dspi", + .data = &devtype_data[LS1043A], + }, { + .compatible = "fsl,ls1046a-dspi", + .data = &devtype_data[LS1046A], + }, { + .compatible = "fsl,ls2080a-dspi", + .data = &devtype_data[LS2080A], + }, { + .compatible = "fsl,ls2085a-dspi", + .data = &devtype_data[LS2085A], + }, { + .compatible = "fsl,lx2160a-dspi", + .data = &devtype_data[LX2160A], + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_dspi_dt_ids); @@ -1064,7 +1125,8 @@ static int dspi_probe(struct platform_device *pdev) ctlr->num_chipselect = pdata->cs_num; ctlr->bus_num = pdata->bus_num; - dspi->devtype_data = &coldfire_data; + /* Only Coldfire uses platform data */ + dspi->devtype_data = &devtype_data[MCF5441X]; } else { ret = of_property_read_u32(np, "spi-num-chipselects", &cs_num); -- 2.20.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/6] spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size [not found] ` <20200302001958.11105-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-02 0:19 ` [PATCH 2/6] spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations Vladimir Oltean @ 2020-03-02 0:19 ` Vladimir Oltean [not found] ` <20200302001958.11105-4-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-02 0:19 ` [PATCH 6/6] spi: spi-fsl-dspi: Convert the instantiations that support it to DMA Vladimir Oltean 2 siblings, 1 reply; 13+ messages in thread From: Vladimir Oltean @ 2020-03-02 0:19 UTC (permalink / raw) To: broonie-DgEjT+Ai2ygdnm+yROfE0A Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Get rid of the ifdef for Coldfire and make these hardware characteristics part of dspi->devtype_data. Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> --- drivers/spi/spi-fsl-dspi.c | 48 ++++++++++++++++++++++---------------- 1 file changed, 28 insertions(+), 20 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 021c658886d4..55ccb3d0f683 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -20,13 +20,6 @@ #define DRIVER_NAME "fsl-dspi" -#ifdef CONFIG_M5441x -#define DSPI_FIFO_SIZE 16 -#else -#define DSPI_FIFO_SIZE 4 -#endif -#define DSPI_DMA_BUFSIZE (DSPI_FIFO_SIZE * 1024) - #define SPI_MCR 0x00 #define SPI_MCR_MASTER BIT(31) #define SPI_MCR_PCSIS (0x3F << 16) @@ -131,6 +124,8 @@ struct fsl_dspi_devtype_data { u8 max_clock_factor; bool ptp_sts_supported; bool xspi_mode; + int fifo_size; + int dma_bufsize; }; enum { @@ -149,54 +144,64 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { [VF610] = { .trans_mode = DSPI_DMA_MODE, .max_clock_factor = 2, + .dma_bufsize = 4096, + .fifo_size = 4, }, [LS1021A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 4, }, [LS1012A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 16, }, [LS1043A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 16, }, [LS1046A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 16, }, [LS2080A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .fifo_size = 4, }, [LS2085A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .fifo_size = 4, }, [LX2160A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .fifo_size = 4, }, [MCF5441X] = { .trans_mode = DSPI_EOQ_MODE, .max_clock_factor = 8, + .fifo_size = 16, }, }; struct fsl_dspi_dma { - /* Length of transfer in words of DSPI_FIFO_SIZE */ + /* Length of transfer in words of dspi->fifo_size */ u32 curr_xfer_len; u32 *tx_dma_buf; @@ -397,7 +402,8 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi) int ret = 0; curr_remaining_bytes = dspi->len; - bytes_per_buffer = DSPI_DMA_BUFSIZE / DSPI_FIFO_SIZE; + bytes_per_buffer = dspi->devtype_data->dma_bufsize / + dspi->devtype_data->fifo_size; while (curr_remaining_bytes) { /* Check if current transfer fits the DMA buffer */ dma->curr_xfer_len = curr_remaining_bytes @@ -449,14 +455,14 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) goto err_tx_channel; } - dma->tx_dma_buf = dma_alloc_coherent(dev, DSPI_DMA_BUFSIZE, + dma->tx_dma_buf = dma_alloc_coherent(dev, dspi->devtype_data->dma_bufsize, &dma->tx_dma_phys, GFP_KERNEL); if (!dma->tx_dma_buf) { ret = -ENOMEM; goto err_tx_dma_buf; } - dma->rx_dma_buf = dma_alloc_coherent(dev, DSPI_DMA_BUFSIZE, + dma->rx_dma_buf = dma_alloc_coherent(dev, dspi->devtype_data->dma_bufsize, &dma->rx_dma_phys, GFP_KERNEL); if (!dma->rx_dma_buf) { ret = -ENOMEM; @@ -493,11 +499,11 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) return 0; err_slave_config: - dma_free_coherent(dev, DSPI_DMA_BUFSIZE, - dma->rx_dma_buf, dma->rx_dma_phys); + dma_free_coherent(dev, dspi->devtype_data->dma_bufsize, + dma->rx_dma_buf, dma->rx_dma_phys); err_rx_dma_buf: - dma_free_coherent(dev, DSPI_DMA_BUFSIZE, - dma->tx_dma_buf, dma->tx_dma_phys); + dma_free_coherent(dev, dspi->devtype_data->dma_bufsize, + dma->tx_dma_buf, dma->tx_dma_phys); err_tx_dma_buf: dma_release_channel(dma->chan_tx); err_tx_channel: @@ -519,13 +525,15 @@ static void dspi_release_dma(struct fsl_dspi *dspi) if (dma->chan_tx) { dma_unmap_single(dev, dma->tx_dma_phys, - DSPI_DMA_BUFSIZE, DMA_TO_DEVICE); + dspi->devtype_data->dma_bufsize, + DMA_TO_DEVICE); dma_release_channel(dma->chan_tx); } if (dma->chan_rx) { dma_unmap_single(dev, dma->rx_dma_phys, - DSPI_DMA_BUFSIZE, DMA_FROM_DEVICE); + dspi->devtype_data->dma_bufsize, + DMA_FROM_DEVICE); dma_release_channel(dma->chan_rx); } } @@ -657,7 +665,7 @@ static void dspi_tcfq_read(struct fsl_dspi *dspi) static void dspi_eoq_write(struct fsl_dspi *dspi) { - int fifo_size = DSPI_FIFO_SIZE; + int fifo_size = dspi->devtype_data->fifo_size; u16 xfer_cmd = dspi->tx_cmd; /* Fill TX FIFO with as many transfers as possible */ @@ -667,7 +675,7 @@ static void dspi_eoq_write(struct fsl_dspi *dspi) if (dspi->len == dspi->bytes_per_word || fifo_size == 0) dspi->tx_cmd |= SPI_PUSHR_CMD_EOQ; /* Clear transfer count for first transfer in FIFO */ - if (fifo_size == (DSPI_FIFO_SIZE - 1)) + if (fifo_size == (dspi->devtype_data->fifo_size - 1)) dspi->tx_cmd |= SPI_PUSHR_CMD_CTCNT; /* Write combined TX FIFO and CMD FIFO entry */ fifo_write(dspi); @@ -676,7 +684,7 @@ static void dspi_eoq_write(struct fsl_dspi *dspi) static void dspi_eoq_read(struct fsl_dspi *dspi) { - int fifo_size = DSPI_FIFO_SIZE; + int fifo_size = dspi->devtype_data->fifo_size; /* Read one FIFO entry and push to rx buffer */ while ((dspi->rx < dspi->rx_end) && fifo_size--) -- 2.17.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <20200302001958.11105-4-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Applied "spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size" to the spi tree [not found] ` <20200302001958.11105-4-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-03-04 18:29 ` Mark Brown 0 siblings, 0 replies; 13+ messages in thread From: Mark Brown @ 2020-03-04 18:29 UTC (permalink / raw) To: Vladimir Oltean Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Mark Brown The patch spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 1d8b4c95c37ccccfc18adef7a13b79fbc3e1557e Mon Sep 17 00:00:00 2001 From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Date: Mon, 2 Mar 2020 02:19:55 +0200 Subject: [PATCH] spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size Get rid of the ifdef for Coldfire and make these hardware characteristics part of dspi->devtype_data. Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Message-Id: <20200302001958.11105-4-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi-fsl-dspi.c | 48 ++++++++++++++++++++++---------------- 1 file changed, 28 insertions(+), 20 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 021c658886d4..55ccb3d0f683 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -20,13 +20,6 @@ #define DRIVER_NAME "fsl-dspi" -#ifdef CONFIG_M5441x -#define DSPI_FIFO_SIZE 16 -#else -#define DSPI_FIFO_SIZE 4 -#endif -#define DSPI_DMA_BUFSIZE (DSPI_FIFO_SIZE * 1024) - #define SPI_MCR 0x00 #define SPI_MCR_MASTER BIT(31) #define SPI_MCR_PCSIS (0x3F << 16) @@ -131,6 +124,8 @@ struct fsl_dspi_devtype_data { u8 max_clock_factor; bool ptp_sts_supported; bool xspi_mode; + int fifo_size; + int dma_bufsize; }; enum { @@ -149,54 +144,64 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { [VF610] = { .trans_mode = DSPI_DMA_MODE, .max_clock_factor = 2, + .dma_bufsize = 4096, + .fifo_size = 4, }, [LS1021A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 4, }, [LS1012A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 16, }, [LS1043A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 16, }, [LS1046A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, .xspi_mode = true, + .fifo_size = 16, }, [LS2080A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .fifo_size = 4, }, [LS2085A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .fifo_size = 4, }, [LX2160A] = { .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .ptp_sts_supported = true, + .fifo_size = 4, }, [MCF5441X] = { .trans_mode = DSPI_EOQ_MODE, .max_clock_factor = 8, + .fifo_size = 16, }, }; struct fsl_dspi_dma { - /* Length of transfer in words of DSPI_FIFO_SIZE */ + /* Length of transfer in words of dspi->fifo_size */ u32 curr_xfer_len; u32 *tx_dma_buf; @@ -397,7 +402,8 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi) int ret = 0; curr_remaining_bytes = dspi->len; - bytes_per_buffer = DSPI_DMA_BUFSIZE / DSPI_FIFO_SIZE; + bytes_per_buffer = dspi->devtype_data->dma_bufsize / + dspi->devtype_data->fifo_size; while (curr_remaining_bytes) { /* Check if current transfer fits the DMA buffer */ dma->curr_xfer_len = curr_remaining_bytes @@ -449,14 +455,14 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) goto err_tx_channel; } - dma->tx_dma_buf = dma_alloc_coherent(dev, DSPI_DMA_BUFSIZE, + dma->tx_dma_buf = dma_alloc_coherent(dev, dspi->devtype_data->dma_bufsize, &dma->tx_dma_phys, GFP_KERNEL); if (!dma->tx_dma_buf) { ret = -ENOMEM; goto err_tx_dma_buf; } - dma->rx_dma_buf = dma_alloc_coherent(dev, DSPI_DMA_BUFSIZE, + dma->rx_dma_buf = dma_alloc_coherent(dev, dspi->devtype_data->dma_bufsize, &dma->rx_dma_phys, GFP_KERNEL); if (!dma->rx_dma_buf) { ret = -ENOMEM; @@ -493,11 +499,11 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) return 0; err_slave_config: - dma_free_coherent(dev, DSPI_DMA_BUFSIZE, - dma->rx_dma_buf, dma->rx_dma_phys); + dma_free_coherent(dev, dspi->devtype_data->dma_bufsize, + dma->rx_dma_buf, dma->rx_dma_phys); err_rx_dma_buf: - dma_free_coherent(dev, DSPI_DMA_BUFSIZE, - dma->tx_dma_buf, dma->tx_dma_phys); + dma_free_coherent(dev, dspi->devtype_data->dma_bufsize, + dma->tx_dma_buf, dma->tx_dma_phys); err_tx_dma_buf: dma_release_channel(dma->chan_tx); err_tx_channel: @@ -519,13 +525,15 @@ static void dspi_release_dma(struct fsl_dspi *dspi) if (dma->chan_tx) { dma_unmap_single(dev, dma->tx_dma_phys, - DSPI_DMA_BUFSIZE, DMA_TO_DEVICE); + dspi->devtype_data->dma_bufsize, + DMA_TO_DEVICE); dma_release_channel(dma->chan_tx); } if (dma->chan_rx) { dma_unmap_single(dev, dma->rx_dma_phys, - DSPI_DMA_BUFSIZE, DMA_FROM_DEVICE); + dspi->devtype_data->dma_bufsize, + DMA_FROM_DEVICE); dma_release_channel(dma->chan_rx); } } @@ -657,7 +665,7 @@ static void dspi_tcfq_read(struct fsl_dspi *dspi) static void dspi_eoq_write(struct fsl_dspi *dspi) { - int fifo_size = DSPI_FIFO_SIZE; + int fifo_size = dspi->devtype_data->fifo_size; u16 xfer_cmd = dspi->tx_cmd; /* Fill TX FIFO with as many transfers as possible */ @@ -667,7 +675,7 @@ static void dspi_eoq_write(struct fsl_dspi *dspi) if (dspi->len == dspi->bytes_per_word || fifo_size == 0) dspi->tx_cmd |= SPI_PUSHR_CMD_EOQ; /* Clear transfer count for first transfer in FIFO */ - if (fifo_size == (DSPI_FIFO_SIZE - 1)) + if (fifo_size == (dspi->devtype_data->fifo_size - 1)) dspi->tx_cmd |= SPI_PUSHR_CMD_CTCNT; /* Write combined TX FIFO and CMD FIFO entry */ fifo_write(dspi); @@ -676,7 +684,7 @@ static void dspi_eoq_write(struct fsl_dspi *dspi) static void dspi_eoq_read(struct fsl_dspi *dspi) { - int fifo_size = DSPI_FIFO_SIZE; + int fifo_size = dspi->devtype_data->fifo_size; /* Read one FIFO entry and push to rx buffer */ while ((dspi->rx < dspi->rx_end) && fifo_size--) -- 2.20.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 6/6] spi: spi-fsl-dspi: Convert the instantiations that support it to DMA [not found] ` <20200302001958.11105-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-02 0:19 ` [PATCH 2/6] spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations Vladimir Oltean 2020-03-02 0:19 ` [PATCH 3/6] spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size Vladimir Oltean @ 2020-03-02 0:19 ` Vladimir Oltean [not found] ` <20200302001958.11105-7-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2 siblings, 1 reply; 13+ messages in thread From: Vladimir Oltean @ 2020-03-02 0:19 UTC (permalink / raw) To: broonie-DgEjT+Ai2ygdnm+yROfE0A Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> The A-011218 eDMA/DSPI erratum affects most of the older Layerscape SoCs with DSPI, and its workaround is a bit intrusive. After this patch, there are no users of TCFQ mode that don't also support XSPI (previously there was LS2085A). Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> --- drivers/spi/spi-fsl-dspi.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index c26a42f8ecbc..c357c3247232 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -147,42 +147,49 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { .fifo_size = 4, }, [LS1021A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 4, }, [LS1012A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 16, }, [LS1043A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 16, }, [LS1046A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 16, }, [LS2080A] = { - .trans_mode = DSPI_TCFQ_MODE, + .trans_mode = DSPI_DMA_MODE, + .dma_bufsize = 8, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 4, }, [LS2085A] = { - .trans_mode = DSPI_TCFQ_MODE, + .trans_mode = DSPI_DMA_MODE, + .dma_bufsize = 8, .max_clock_factor = 8, .fifo_size = 4, }, [LX2160A] = { - .trans_mode = DSPI_TCFQ_MODE, + .trans_mode = DSPI_DMA_MODE, + .dma_bufsize = 8, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 4, -- 2.17.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <20200302001958.11105-7-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Applied "spi: spi-fsl-dspi: Convert the instantiations that support it to DMA" to the spi tree [not found] ` <20200302001958.11105-7-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2020-03-04 18:29 ` Mark Brown 0 siblings, 0 replies; 13+ messages in thread From: Mark Brown @ 2020-03-04 18:29 UTC (permalink / raw) To: Vladimir Oltean Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Mark Brown The patch spi: spi-fsl-dspi: Convert the instantiations that support it to DMA has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 0feaf8f5afe057c397a440e76865b3d746dc9f7e Mon Sep 17 00:00:00 2001 From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Date: Mon, 2 Mar 2020 02:19:58 +0200 Subject: [PATCH] spi: spi-fsl-dspi: Convert the instantiations that support it to DMA The A-011218 eDMA/DSPI erratum affects most of the older Layerscape SoCs with DSPI, and its workaround is a bit intrusive. After this patch, there are no users of TCFQ mode that don't also support XSPI (previously there was LS2085A). Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org> Message-Id: <20200302001958.11105-7-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi-fsl-dspi.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index c26a42f8ecbc..c357c3247232 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -147,42 +147,49 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { .fifo_size = 4, }, [LS1021A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 4, }, [LS1012A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 16, }, [LS1043A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 16, }, [LS1046A] = { + /* Has A-011218 DMA erratum */ .trans_mode = DSPI_TCFQ_MODE, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 16, }, [LS2080A] = { - .trans_mode = DSPI_TCFQ_MODE, + .trans_mode = DSPI_DMA_MODE, + .dma_bufsize = 8, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 4, }, [LS2085A] = { - .trans_mode = DSPI_TCFQ_MODE, + .trans_mode = DSPI_DMA_MODE, + .dma_bufsize = 8, .max_clock_factor = 8, .fifo_size = 4, }, [LX2160A] = { - .trans_mode = DSPI_TCFQ_MODE, + .trans_mode = DSPI_DMA_MODE, + .dma_bufsize = 8, .max_clock_factor = 8, .xspi_mode = true, .fifo_size = 4, -- 2.20.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2020-03-04 18:29 UTC | newest] Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-03-02 0:19 [PATCH 0/6] Compatible string consolidation for NXP DSPI driver Vladimir Oltean 2020-03-02 0:19 ` [PATCH 1/6] doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs Vladimir Oltean 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs" to the spi tree Mark Brown 2020-03-02 0:19 ` [PATCH 4/6] spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode Vladimir Oltean [not found] ` <20200302001958.11105-5-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode" to the spi tree Mark Brown 2020-03-02 0:19 ` [PATCH 5/6] spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes Vladimir Oltean [not found] ` <20200302001958.11105-6-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes" to the spi tree Mark Brown [not found] ` <20200302001958.11105-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-02 0:19 ` [PATCH 2/6] spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations Vladimir Oltean 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations" to the spi tree Mark Brown 2020-03-02 0:19 ` [PATCH 3/6] spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size Vladimir Oltean [not found] ` <20200302001958.11105-4-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size" to the spi tree Mark Brown 2020-03-02 0:19 ` [PATCH 6/6] spi: spi-fsl-dspi: Convert the instantiations that support it to DMA Vladimir Oltean [not found] ` <20200302001958.11105-7-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-04 18:29 ` Applied "spi: spi-fsl-dspi: Convert the instantiations that support it to DMA" to the spi tree Mark Brown
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