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From: Pratyush Yadav <p.yadav@ti.com>
To: <masonccyang@mxic.com.tw>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Mark Brown <broonie@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-mtd@lists.infradead.org>, <linux-spi@vger.kernel.org>,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Sekhar Nori <nsekhar@ti.com>, Richard Weinberger <richard@nod.at>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Vignesh Raghavendra <vigneshr@ti.com>, <juliensu@mxic.com.tw>
Subject: Re: [PATCH v5 09/19] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table
Date: Wed, 20 May 2020 14:25:36 +0530	[thread overview]
Message-ID: <20200520085534.yra4f5ww5xs23c4j@ti.com> (raw)
In-Reply-To: <OF83616464.480FA751-ON4825856E.002A4483-4825856E.002BE6AF@mxic.com.tw>

Hi Mason,

On 20/05/20 03:59PM, masonccyang@mxic.com.tw wrote:
> 
> Hi Pratyush, 
> 
> > +/**
> > + * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table
> > + * @nor:      pointer to a 'struct spi_nor'
> > + * @param_header:   pointer to the 'struct sfdp_parameter_header' 
> describing
> > + *         the 4-Byte Address Instruction Table length and version.
> > + * @params:      pointer to the 'struct spi_nor_flash_parameter' to be.
> > + *
> > + * Return: 0 on success, -errno otherwise.
> > + */
> > +static int spi_nor_parse_profile1(struct spi_nor *nor,
> > +              const struct sfdp_parameter_header *profile1_header,
> > +              struct spi_nor_flash_parameter *params)
> > +{
> > +   u32 *table, opcode, addr;
> > +   size_t len;
> > +   int ret, i;
> > +
> > +   len = profile1_header->length * sizeof(*table);
> > +   table = kmalloc(len, GFP_KERNEL);
> > +   if (!table)
> > +      return -ENOMEM;
> > +
> > +   addr = SFDP_PARAM_HEADER_PTP(profile1_header);
> > +   ret = spi_nor_read_sfdp(nor, addr, len, table);
> > +   if (ret)
> > +      goto out;
> > +
> > +   /* Fix endianness of the table DWORDs. */
> > +   for (i = 0; i < profile1_header->length; i++)
> > +      table[i] = le32_to_cpu(table[i]);
> > +
> > +   /* Get 8D-8D-8D fast read opcode and dummy cycles. */
> > +   opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, table[0]);
> > +
> > +   /*
> > +    * Update the fast read settings. We set the default dummy cycles to 
> 20
> > +    * here. Flashes can change this value if they need to when enabling
> > +    * octal mode.
> > +    */
> > +   spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_8_8_8_DTR],
> > +              0, 20, opcode,
> > +              SNOR_PROTO_8_8_8_DTR);
> > +
> 
> 
> I thought we have a agreement that only do parse here, no other read 
> parameters setting.

Yes, and I considered it. But it didn't make much sense to me to 
introduce an extra member in struct spi_nor just to make this call in 
some other function later.

Why exactly do you think doing this here is bad? The way I see it, we 
avoid carrying around an extra member in spi_nor and this also allows 
flashes to change the read settings easily in a post-sfdp hook. The 
4bait parsing function does something similar.

What are the benefits of doing it otherwise?

Note that I did remove HWCAPS selection from here, which did seem like a 
sane idea.
 
> Driver should get dummy cycles used for various frequencies 
> from 4th and 5th DWORD of xSPI table.[1]
>  
> [1] 
> https://patchwork.ozlabs.org/project/linux-mtd/patch/1587451187-6889-3-git-send-email-masonccyang@mxic.com.tw/ 
> 
> 
> In addition, 20 dummy cycles is for 200MHz but not for 100MHz, 133MHz and 
> 166MHz
> in case of read performance concern.
> 
> Given a correct dummy cycles for a specific device. [2] 
> 
> [2] 
> https://patchwork.ozlabs.org/project/linux-mtd/patch/1587451187-6889-5-git-send-email-masonccyang@mxic.com.tw/ 

The problem is that we don't know what speed the controller is driving 
the flash at, and whether it is using Data Strobe. BFPT tells us the 
maximum speed of the flash based on if Data Strobe is being used. The 
controller can also drive it slower than the maximum. And it can drive 
it with or without DS.

So, we have to be conservative and just use the dummy cycles for the 
maximum speed so we can at least make sure the flash works, albeit at 
slightly less efficiency. I hard-coded it to 20 but I suppose we can 
find it out from the Profile 1.0 table and use that (though we'd have to 
round it to an even value to avoid tripping up controllers). Will fix in 
next version (or, Tudor if you're fine with fixup! patches, I can send 
that too because I suspect it will be a small change).
 
> 
> > +   /*
> > +    * Set the Read Status Register dummy cycles and dummy address 
> bytes.
> > +    */
> > +   if (table[0] & PROFILE1_DWORD1_RDSR_DUMMY)
> > +      params->rdsr_dummy = 8;
> > +   else
> > +      params->rdsr_dummy = 4;
> > +
> > +   if (table[0] & PROFILE1_DWORD1_RDSR_ADDR_BYTES)
> > +      params->rdsr_addr_nbytes = 4;
> > +   else
> > +      params->rdsr_addr_nbytes = 0;
> > +
> > +out:
> > +   kfree(table);
> > +   return ret;
> > +}
> > +
> 

-- 
Regards,
Pratyush Yadav
Texas Instruments India

  reply	other threads:[~2020-05-20  8:56 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-19 14:26 [PATCH v5 00/19] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 01/19] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-05-21  8:27   ` masonccyang
2020-05-22 10:45     ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 02/19] spi: atmel-quadspi: reject DTR ops Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 03/19] spi: spi-mtk-nor: " Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 04/19] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 05/19] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-05-21  9:24   ` masonccyang
2020-05-21 12:52     ` Pratyush Yadav
2020-05-22  6:30   ` masonccyang
2020-05-22  8:37     ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 06/19] mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 07/19] mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 08/19] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 09/19] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-05-20  7:59   ` masonccyang
2020-05-20  8:55     ` Pratyush Yadav [this message]
2020-05-20  9:40       ` masonccyang
2020-05-20 10:37         ` Pratyush Yadav
2020-05-21  8:09           ` masonccyang
2020-05-21  9:14             ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 10/19] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 11/19] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 12/19] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 13/19] mtd: spi-nor: sfdp: do not make invalid quad enable fatal Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 14/19] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 15/19] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 16/19] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 17/19] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 18/19] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 19/19] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav

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