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From: Boris Brezillon <boris.brezillon@collabora.com>
To: Pratyush Yadav <p.yadav@ti.com>, Richard Weinberger <richard@nod.at>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	Sekhar Nori <nsekhar@ti.com>,
	Mason Yang <masonccyang@mxic.com.tw>
Subject: Re: [PATCH v7 02/20] spi: spi-mem: allow specifying a command's extension
Date: Fri, 22 May 2020 17:32:54 +0200	[thread overview]
Message-ID: <20200522173254.05316d47@collabora.com> (raw)
In-Reply-To: <20200522101301.26909-3-p.yadav@ti.com>

On Fri, 22 May 2020 15:42:43 +0530
Pratyush Yadav <p.yadav@ti.com> wrote:

> In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
> the "command extension". There can be 3 types of extensions in xSPI:
> repeat, invert, and hex. When the extension type is "repeat", the same
> opcode is sent twice. When it is "invert", the second byte is the
> inverse of the opcode. When it is "hex" an additional opcode byte based
> is sent with the command whose value can be anything.
> 
> So, make opcode a 16-bit value and add a 'nbytes', similar to how
> multiple address widths are handled.

A slightly different version of patch 5 should go before this patch,
otherwise your series is not bisectable. By slightly different, I mean
that you should only write one byte, but put this byte in a temporary
var. Or maybe you can squash patch 5 in this one and mention why you do
so in your commit message.

> 
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> ---
>  drivers/spi/spi-mem.c       | 5 ++++-
>  include/linux/spi/spi-mem.h | 6 +++++-
>  2 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index 93e255287ab9..29dcd1d62710 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -159,6 +159,9 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
>  	if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
>  		return false;
>  
> +	if (op->cmd.nbytes != 1)
> +		return false;
> +
>  	return true;
>  }
>  EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
> @@ -173,7 +176,7 @@ static bool spi_mem_buswidth_is_valid(u8 buswidth)
>  
>  static int spi_mem_check_op(const struct spi_mem_op *op)
>  {
> -	if (!op->cmd.buswidth)
> +	if (!op->cmd.buswidth || !op->cmd.nbytes)
>  		return -EINVAL;
>  
>  	if ((op->addr.nbytes && !op->addr.buswidth) ||
> diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
> index e3dcb956bf61..159463cc659c 100644
> --- a/include/linux/spi/spi-mem.h
> +++ b/include/linux/spi/spi-mem.h
> @@ -17,6 +17,7 @@
>  	{							\
>  		.buswidth = __buswidth,				\
>  		.opcode = __opcode,				\
> +		.nbytes = 1,					\
>  	}
>  
>  #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth)		\
> @@ -69,6 +70,8 @@ enum spi_mem_data_dir {
>  
>  /**
>   * struct spi_mem_op - describes a SPI memory operation
> + * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is
> + *		sent MSB-first.
>   * @cmd.buswidth: number of IO lines used to transmit the command
>   * @cmd.opcode: operation opcode
>   * @cmd.dtr: whether the command opcode should be sent in DTR mode or not
> @@ -94,9 +97,10 @@ enum spi_mem_data_dir {
>   */
>  struct spi_mem_op {
>  	struct {
> +		u8 nbytes;
>  		u8 buswidth;
>  		u8 dtr : 1;
> -		u8 opcode;
> +		u16 opcode;
>  	} cmd;
>  
>  	struct {


  reply	other threads:[~2020-05-22 15:33 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-22 10:12 [PATCH v7 00/20] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 01/20] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 02/20] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-05-22 15:32   ` Boris Brezillon [this message]
2020-05-22 20:30     ` Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 03/20] spi: atmel-quadspi: reject DTR ops Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 04/20] spi: spi-mtk-nor: " Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 05/20] spi: mxic: Avoid endianness problems with 2-byte opcodes Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 06/20] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 07/20] mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 08/20] mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 09/20] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 10/20] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 11/20] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 12/20] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 13/20] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 14/20] mtd: spi-nor: sfdp: do not make invalid quad enable fatal Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 15/20] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 16/20] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 17/20] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 18/20] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-05-22 10:13 ` [PATCH v7 19/20] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-05-22 10:13 ` [PATCH v7 20/20] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav

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