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From: Xu Yilun <yilun.xu@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	trix@redhat.com, hao.wu@intel.com,
	matthew.gerlach@linux.intel.com, russell.h.weight@intel.com
Subject: Re: [PATCH v2 0/6] add regmap & indirect access support
Date: Fri, 19 Jun 2020 09:23:28 +0800	[thread overview]
Message-ID: <20200619012328.GA8641@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20200618153539.GM5789@sirena.org.uk>

On Thu, Jun 18, 2020 at 04:35:39PM +0100, Mark Brown wrote:
> On Thu, Jun 18, 2020 at 11:25:07PM +0800, Xu Yilun wrote:
> > Updated the regmap & indirect access support for spi-altera.
> > 
> > Patch #1, #2, #3 is already applied.
> 
> The numbering for patches within a series is there *only* to say what
> order things need to go in in that posting, they don't have any
> relevance from one posting to another.  Sending a series with some
> numbers missing causes a lot of confusion since it's not clear which
> patches even exist.

Thanks for your guidance. I'll take care of it.

Think I should re-send this patch to make it clear.



  reply	other threads:[~2020-06-19  1:27 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-18 15:25 [PATCH v2 0/6] add regmap & indirect access support Xu Yilun
2020-06-18 15:25 ` [PATCH v2 4/6] spi: altera: use regmap-mmio instead of direct mmio register access Xu Yilun
2020-06-18 15:25 ` [PATCH v2 5/6] spi: altera: support indirect access to the registers Xu Yilun
2020-06-18 15:25 ` [PATCH v2 6/6] spi: altera: fix size mismatch on 64 bit processors Xu Yilun
2020-06-18 15:35 ` [PATCH v2 0/6] add regmap & indirect access support Mark Brown
2020-06-19  1:23   ` Xu Yilun [this message]
2020-06-18 19:46 ` Tom Rix

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