From: Shreyas Joshi <shreyas.joshi@biamp.com>
To: broonie@kernel.org, linux-spi@vger.kernel.org, shreyasjoshi15@gmail.com
Cc: linux-kernel@vger.kernel.org, Shreyas Joshi <shreyas.joshi@biamp.com>
Subject: [PATCH] spi: spi-cadence: add support for chip select high
Date: Tue, 21 Jul 2020 10:08:50 +1000 [thread overview]
Message-ID: <20200721000850.370-1-shreyas.joshi@biamp.com> (raw)
In-Reply-To: <20200710211655.1564-1-shreyas.joshi@biamp.com>
The spi cadence driver should support spi-cs-high in mode bits
so that the peripherals that needs the chip select to be high active can
use it. Add the SPI-CS-HIGH flag in the supported mode bits.
Signed-off-by: Shreyas Joshi <shreyas.joshi@biamp.com>
---
drivers/spi/spi-cadence.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c
index 82a0ee09cbe1..2b6b9c1ad9d0 100644
--- a/drivers/spi/spi-cadence.c
+++ b/drivers/spi/spi-cadence.c
@@ -556,7 +556,7 @@ static int cdns_spi_probe(struct platform_device *pdev)
master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware;
master->set_cs = cdns_spi_chipselect;
master->auto_runtime_pm = true;
- master->mode_bits = SPI_CPOL | SPI_CPHA;
+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
/* Set to default valid value */
master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;
--
2.20.1
next prev parent reply other threads:[~2020-07-21 0:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-10 4:51 [PATCH] spi: spi-cadence: add support for chip select high Shreyas Joshi
2020-07-10 15:35 ` Mark Brown
2020-07-10 21:16 ` Shreyas Joshi
2020-07-20 3:55 ` Shreyas Joshi
2020-07-20 12:54 ` Mark Brown
2020-07-21 0:08 ` Shreyas Joshi [this message]
2020-07-22 13:45 ` Mark Brown
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