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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Mark Brown <broonie@kernel.org>, Serge Semin <fancer.lancer@gmail.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	"wuxu . wu" <wuxu.wu@huawei.com>, Feng Tang <feng.tang@intel.com>,
	Rob Herring <robh+dt@kernel.org>, <linux-spi@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v4 18/21] spi: dw: Introduce max mem-ops SPI bus frequency setting
Date: Thu, 8 Oct 2020 02:55:07 +0300
Message-ID: <20201007235511.4935-19-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20201007235511.4935-1-Sergey.Semin@baikalelectronics.ru>

In some circumstances the current implementation of the SPI memory
operations may occasionally fail even though they are executed in the
atomic context. This may happen if the system bus is relatively slow in
comparison to the SPI bus frequency, or there is a concurrent access to
it, which makes the MMIO-operations occasionally stalling before
push-pulling data from the DW APB SPI FIFOs. These two problems we've
discovered on the Baikal-T1 SoC. In order to fix them we have no choice
but to set an artificial limitation on the SPI bus speed.

Note currently this limitation will be only applicable for the memory
operations, since the standard SPI core interface is implemented with an
assumption that there is no problem with the automatic CS toggling.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
---
 drivers/spi/spi-dw-core.c | 4 +++-
 drivers/spi/spi-dw.h      | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 8eb3b31b376d..bcfa224e0e43 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -629,7 +629,7 @@ static int dw_spi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op)
 	 * operation. Transmit-only mode is suitable for the rest of them.
 	 */
 	cfg.dfs = 8;
-	cfg.freq = mem->spi->max_speed_hz;
+	cfg.freq = clamp(mem->spi->max_speed_hz, 0U, dws->max_mem_freq);
 	if (op->data.dir == SPI_MEM_DATA_IN) {
 		cfg.tmode = SPI_TMOD_EPROMREAD;
 		cfg.ndf = op->data.nbytes;
@@ -717,6 +717,8 @@ static void dw_spi_init_mem_ops(struct dw_spi *dws)
 		dws->mem_ops.adjust_op_size = dw_spi_adjust_mem_op_size;
 		dws->mem_ops.supports_op = dw_spi_supports_mem_op;
 		dws->mem_ops.exec_op = dw_spi_exec_mem_op;
+		if (!dws->max_mem_freq)
+			dws->max_mem_freq = dws->max_freq;
 	}
 }
 
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 4b08fe34a85d..dc5781236cc6 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -148,6 +148,7 @@ struct dw_spi {
 	unsigned long		paddr;
 	int			irq;
 	u32			fifo_len;	/* depth of the FIFO buffer */
+	u32			max_mem_freq;	/* max mem-ops bus freq */
 	u32			max_freq;	/* max bus freq supported */
 
 	u32			caps;		/* DW SPI capabilities */
-- 
2.27.0


  parent reply index

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-07 23:54 [PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support Serge Semin
2020-10-07 23:54 ` [PATCH v4 01/21] spi: dw: Use an explicit set_cs assignment Serge Semin
2020-10-07 23:54 ` [PATCH v4 02/21] spi: dw: Add DWC SSI capability Serge Semin
2020-10-07 23:54 ` [PATCH v4 03/21] spi: dw: Detach SPI device specific CR0 config method Serge Semin
2020-10-07 23:54 ` [PATCH v4 04/21] spi: dw: Update SPI bus speed in a config function Serge Semin
2020-10-07 23:54 ` [PATCH v4 05/21] spi: dw: Simplify the SPI bus speed config procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 06/21] spi: dw: Update Rx sample delay in the config function Serge Semin
2020-10-07 23:54 ` [PATCH v4 07/21] spi: dw: Add DW SPI controller config structure Serge Semin
2020-10-07 23:54 ` [PATCH v4 08/21] spi: dw: Refactor data IO procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 09/21] spi: dw: Refactor IRQ-based SPI transfer procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 10/21] spi: dw: Perform IRQ setup in a dedicated function Serge Semin
2020-10-07 23:55 ` [PATCH v4 11/21] spi: dw: Unmask IRQs after enabling the chip Serge Semin
2020-10-07 23:55 ` [PATCH v4 12/21] spi: dw: Discard chip enabling on DMA setup error Serge Semin
2020-10-07 23:55 ` [PATCH v4 13/21] spi: dw: De-assert chip-select on reset Serge Semin
2020-10-07 23:55 ` [PATCH v4 14/21] spi: dw: Explicitly de-assert CS on SPI transfer completion Serge Semin
2020-10-07 23:55 ` [PATCH v4 15/21] spi: dw: Move num-of retries parameter to the header file Serge Semin
2020-10-07 23:55 ` [PATCH v4 16/21] spi: dw: Add generic DW SSI status-check method Serge Semin
2020-10-07 23:55 ` [PATCH v4 17/21] spi: dw: Add memory operations support Serge Semin
2020-10-07 23:55 ` Serge Semin [this message]
2020-10-07 23:55 ` [PATCH v4 19/21] spi: dw: Add poll-based SPI transfers support Serge Semin
2020-10-07 23:55 ` [PATCH v4 20/21] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers Serge Semin
2020-10-07 23:55 ` [PATCH v4 21/21] spi: dw: Add Baikal-T1 SPI Controller glue driver Serge Semin
2020-10-08 22:02 ` [PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support Mark Brown

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