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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Mark Brown <broonie@kernel.org>, Serge Semin <fancer.lancer@gmail.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	"wuxu . wu" <wuxu.wu@huawei.com>, Feng Tang <feng.tang@intel.com>,
	Rob Herring <robh+dt@kernel.org>, <linux-spi@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v4 03/21] spi: dw: Detach SPI device specific CR0 config method
Date: Thu, 8 Oct 2020 02:54:52 +0300
Message-ID: <20201007235511.4935-4-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20201007235511.4935-1-Sergey.Semin@baikalelectronics.ru>

Indeed there is no point in detecting the SPI peripheral device parameters
and initializing the CR0 register fields each time an SPI transfer is
executed. Instead let's define a dedicated CR0 chip-data member, which
will be initialized in accordance with the SPI device settings at the
moment of setting it up.

By doing so we'll finally make the SPI device chip_data serving as it's
supposed to - to preserve the SPI device specific DW SPI configuration.
See spi-fsl-dspi.c, spi-pl022.c, spi-pxa2xx.c drivers for example of the
way the chip data is utilized.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>

---

Changelog v4:
- Rename dw_spi_get_cr0() to dw_spi_prepare_cr0().
---
 drivers/spi/spi-dw-core.c | 43 +++++++++++++++++++++++++++------------
 1 file changed, 30 insertions(+), 13 deletions(-)

diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index be16fdaf7ce0..f7a2d1919c09 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -27,6 +27,7 @@ struct chip_data {
 	u16 clk_div;		/* baud rate divider */
 	u32 speed_hz;		/* baud rate */
 
+	u32 cr0;
 	u32 rx_sample_dly;	/* RX sample delay */
 };
 
@@ -228,14 +229,9 @@ static irqreturn_t dw_spi_irq(int irq, void *dev_id)
 	return dws->transfer_handler(dws);
 }
 
-static void dw_spi_update_cr0(struct dw_spi *dws, struct spi_device *spi,
-			      struct spi_transfer *transfer)
+static u32 dw_spi_prepare_cr0(struct dw_spi *dws, struct spi_device *spi)
 {
-	struct chip_data *chip = spi_get_ctldata(spi);
-	u32 cr0;
-
-	/* CTRLR0[ 4/3: 0] Data Frame Size */
-	cr0 = (transfer->bits_per_word - 1);
+	u32 cr0 = 0;
 
 	if (!(dws->caps & DW_SPI_CAP_DWC_SSI)) {
 		/* CTRLR0[ 5: 4] Frame Format */
@@ -251,9 +247,6 @@ static void dw_spi_update_cr0(struct dw_spi *dws, struct spi_device *spi,
 
 		/* CTRLR0[11] Shift Register Loop */
 		cr0 |= ((spi->mode & SPI_LOOP) ? 1 : 0) << SPI_SRL_OFFSET;
-
-		/* CTRLR0[ 9:8] Transfer Mode */
-		cr0 |= chip->tmode << SPI_TMOD_OFFSET;
 	} else {
 		/* CTRLR0[ 7: 6] Frame Format */
 		cr0 |= SSI_MOTO_SPI << DWC_SSI_CTRLR0_FRF_OFFSET;
@@ -269,13 +262,29 @@ static void dw_spi_update_cr0(struct dw_spi *dws, struct spi_device *spi,
 		/* CTRLR0[13] Shift Register Loop */
 		cr0 |= ((spi->mode & SPI_LOOP) ? 1 : 0) << DWC_SSI_CTRLR0_SRL_OFFSET;
 
-		/* CTRLR0[11:10] Transfer Mode */
-		cr0 |= chip->tmode << DWC_SSI_CTRLR0_TMOD_OFFSET;
-
 		if (dws->caps & DW_SPI_CAP_KEEMBAY_MST)
 			cr0 |= DWC_SSI_CTRLR0_KEEMBAY_MST;
 	}
 
+	return cr0;
+}
+
+static void dw_spi_update_cr0(struct dw_spi *dws, struct spi_device *spi,
+			      struct spi_transfer *transfer)
+{
+	struct chip_data *chip = spi_get_ctldata(spi);
+	u32 cr0 = chip->cr0;
+
+	/* CTRLR0[ 4/3: 0] Data Frame Size */
+	cr0 |= (transfer->bits_per_word - 1);
+
+	if (!(dws->caps & DW_SPI_CAP_DWC_SSI))
+		/* CTRLR0[ 9:8] Transfer Mode */
+		cr0 |= chip->tmode << SPI_TMOD_OFFSET;
+	else
+		/* CTRLR0[11:10] Transfer Mode */
+		cr0 |= chip->tmode << DWC_SSI_CTRLR0_TMOD_OFFSET;
+
 	dw_writel(dws, DW_SPI_CTRLR0, cr0);
 }
 
@@ -373,6 +382,7 @@ static void dw_spi_handle_err(struct spi_controller *master,
 /* This may be called twice for each spi dev */
 static int dw_spi_setup(struct spi_device *spi)
 {
+	struct dw_spi *dws = spi_controller_get_devdata(spi->controller);
 	struct chip_data *chip;
 
 	/* Only alloc on first setup */
@@ -396,6 +406,13 @@ static int dw_spi_setup(struct spi_device *spi)
 							dws->max_freq);
 	}
 
+	/*
+	 * Update CR0 data each time the setup callback is invoked since
+	 * the device parameters could have been changed, for instance, by
+	 * the MMC SPI driver or something else.
+	 */
+	chip->cr0 = dw_spi_prepare_cr0(dws, spi);
+
 	chip->tmode = SPI_TMOD_TR;
 
 	return 0;
-- 
2.27.0


  parent reply index

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-07 23:54 [PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support Serge Semin
2020-10-07 23:54 ` [PATCH v4 01/21] spi: dw: Use an explicit set_cs assignment Serge Semin
2020-10-07 23:54 ` [PATCH v4 02/21] spi: dw: Add DWC SSI capability Serge Semin
2020-10-07 23:54 ` Serge Semin [this message]
2020-10-07 23:54 ` [PATCH v4 04/21] spi: dw: Update SPI bus speed in a config function Serge Semin
2020-10-07 23:54 ` [PATCH v4 05/21] spi: dw: Simplify the SPI bus speed config procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 06/21] spi: dw: Update Rx sample delay in the config function Serge Semin
2020-10-07 23:54 ` [PATCH v4 07/21] spi: dw: Add DW SPI controller config structure Serge Semin
2020-10-07 23:54 ` [PATCH v4 08/21] spi: dw: Refactor data IO procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 09/21] spi: dw: Refactor IRQ-based SPI transfer procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 10/21] spi: dw: Perform IRQ setup in a dedicated function Serge Semin
2020-10-07 23:55 ` [PATCH v4 11/21] spi: dw: Unmask IRQs after enabling the chip Serge Semin
2020-10-07 23:55 ` [PATCH v4 12/21] spi: dw: Discard chip enabling on DMA setup error Serge Semin
2020-10-07 23:55 ` [PATCH v4 13/21] spi: dw: De-assert chip-select on reset Serge Semin
2020-10-07 23:55 ` [PATCH v4 14/21] spi: dw: Explicitly de-assert CS on SPI transfer completion Serge Semin
2020-10-07 23:55 ` [PATCH v4 15/21] spi: dw: Move num-of retries parameter to the header file Serge Semin
2020-10-07 23:55 ` [PATCH v4 16/21] spi: dw: Add generic DW SSI status-check method Serge Semin
2020-10-07 23:55 ` [PATCH v4 17/21] spi: dw: Add memory operations support Serge Semin
2020-10-07 23:55 ` [PATCH v4 18/21] spi: dw: Introduce max mem-ops SPI bus frequency setting Serge Semin
2020-10-07 23:55 ` [PATCH v4 19/21] spi: dw: Add poll-based SPI transfers support Serge Semin
2020-10-07 23:55 ` [PATCH v4 20/21] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers Serge Semin
2020-10-07 23:55 ` [PATCH v4 21/21] spi: dw: Add Baikal-T1 SPI Controller glue driver Serge Semin
2020-10-08 22:02 ` [PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support Mark Brown

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