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From: Mark Brown <broonie@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, "R, Vignesh" <vigneshr@ti.com>,
	juliensu@mxic.com.tw, ycllin@mxic.com.tw,
	linux-spi <linux-spi@vger.kernel.org>,
	MTD Maling List <linux-mtd@lists.infradead.org>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	zhengxunli <zhengxunli@mxic.com.tw>
Subject: Re: [PATCH v2 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash
Date: Tue, 23 Feb 2021 18:14:24 +0000
Message-ID: <20210223181424.GJ5116@sirena.org.uk> (raw)
In-Reply-To: <CAMuHMdVQUCaiBwdU=KdFOu=D71kYbGqoqp9V3pLsXXE0AAdCog@mail.gmail.com>


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On Tue, Feb 23, 2021 at 07:07:37PM +0100, Geert Uytterhoeven wrote:
> On Tue, Feb 23, 2021 at 4:25 PM Pratyush Yadav <p.yadav@ti.com> wrote:

> > To select the optimal number of dummy cycles we need to know what speed
> > the controller is running at, not the other way around. The flash would
> > always set the top speed to its maximum (say 200 MHz). But if the
> > controller is only capable of running at 50 MHz, you will end up wasting
> > dummy cycles. I don't see any API to communicate speed from controller
> > to flash.

> spi_transfer.effective_speed_hz?

> If the driver has filled this in (after the first transfer), you can optimize
> dummy cycles before doing the next transfer.  Note that effective_speed_hz
> might not always be the same, if e.g. the SPI controller shares its parent
> clock with another component.

Yes, that's what that's for, or just go with the speed set by the client
on the basis that it should be safe even if potentially wasteful.  You'd
need to fall back to that anyway in the cases where the controller
doesn't or can't report the effective speed.

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  reply index

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-05  9:36 [PATCH v2 0/2] Add octal DTR support for Macronix flash zhengxunli
2021-02-05  9:36 ` [PATCH v2 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash zhengxunli
2021-02-05  9:47   ` Miquel Raynal
2021-02-05 13:34     ` Pratyush Yadav
2021-02-05 13:50       ` Miquel Raynal
2021-02-23 13:13       ` Miquel Raynal
2021-02-23 13:36         ` Mark Brown
2021-02-23 15:25           ` Pratyush Yadav
2021-02-23 18:07             ` Geert Uytterhoeven
2021-02-23 18:14               ` Mark Brown [this message]
     [not found]                 ` <OF5890F10B.27BC3B4B-ON482586A7.001FE05B-482586A7.0024305D@mxic.com.tw>
2021-04-05  4:41                   ` Tudor.Ambarus
2021-02-05  9:36 ` [PATCH v2 2/2] spi: mxic: patch for octal DTR mode support zhengxunli
2021-02-19  5:58   ` zhengxunli
2021-02-23 13:28     ` Mark Brown

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