[RESEND PATCH v2 0/2] spi:amd:Support for new generation of AMD SOCs.

[RESEND PATCH v2 0/2] spi:amd:Support for new generation of AMD SOCs.

[Nehal Bakulchandra Shah]

Fix for limitation  of max 72 bytes size of fifo transfer.
Also, new generation SOC support added with modificationwith register
and few of the helper functions.

Changes in v2:
-Split the patch
-Incorporate review comments

Changes in v1:
-Initial patch for adding support of new generation of SOC
-Fix for 72 bytes of FIFO Size

Nehal Bakulchandra Shah (2):
  spi:amd: Add support for latest platform
  spi:amd: Fix for transfer large size of data

 drivers/spi/spi-amd.c | 149 +++++++++++++++++++++++++++++++++++-------
 1 file changed, 125 insertions(+), 24 deletions(-)

-- 
2.25.1

[RESEND PATCH v2 1/2] spi:amd: Add support for latest platform

[Nehal Bakulchandra Shah]

-Add device ID for new generation of platform.
-Modify spi_busy and opcode commands based on controller version.

Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Liang Liang <liang.liang@amd.com>
Signed-off-by: Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com>
---
 drivers/spi/spi-amd.c | 72 +++++++++++++++++++++++++++++++++++++------
 1 file changed, 63 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c
index 3cf76096a76d..e65e7178d5fe 100644
--- a/drivers/spi/spi-amd.c
+++ b/drivers/spi/spi-amd.c
@@ -14,10 +14,12 @@
 #include <linux/spi/spi.h>

 #define AMD_SPI_CTRL0_REG	0x00
+#define AMD_SPI_OPCODE_REG  0x45
+#define AMD_SPI_CMD_TRIGGER_REG 0x47
 #define AMD_SPI_EXEC_CMD	BIT(16)
 #define AMD_SPI_FIFO_CLEAR	BIT(20)
 #define AMD_SPI_BUSY		BIT(31)
-
+#define AMD_SPI_TRIGGER_CMD	BIT(7)
 #define AMD_SPI_OPCODE_MASK	0xFF

 #define AMD_SPI_ALT_CS_REG	0x1D
@@ -34,11 +36,31 @@
 #define AMD_SPI_XFER_TX		1
 #define AMD_SPI_XFER_RX		2

+#ifdef CONFIG_ACPI
+struct amd_spi_devtype_data {
+	u32 spi_status;
+	u8	version;
+};
+
+static const struct amd_spi_devtype_data spi_v1 = {
+	.spi_status	= AMD_SPI_CTRL0_REG,
+	.version	= 0,
+};
+
+static const struct amd_spi_devtype_data spi_v2 = {
+	.spi_status	= AMD_SPI_STATUS_REG,
+	.version	= 1,
+};
+#endif
+
 struct amd_spi {
 	void __iomem *io_remap_addr;
 	unsigned long io_base_addr;
 	u32 rom_addr;
 	u8 chip_select;
+	const struct amd_spi_devtype_data *devtype_data;
+	struct spi_device *spi_dev;
+	struct spi_master *master;
 };

 static inline u8 amd_spi_readreg8(struct spi_master *master, int idx)
@@ -98,6 +120,14 @@ static void amd_spi_select_chip(struct spi_master *master)
 			      AMD_SPI_ALT_CS_MASK);
 }

+static void amd_spi_clear_chip(struct spi_master *master)
+{
+	struct amd_spi *amd_spi = spi_master_get_devdata(master);
+	u8 chip_select = amd_spi->chip_select;
+
+	amd_spi_writereg8(master, AMD_SPI_ALT_CS_REG, chip_select & 0XFC);
+}
+
 static void amd_spi_clear_fifo_ptr(struct spi_master *master)
 {
 	amd_spi_setclear_reg32(master, AMD_SPI_CTRL0_REG, AMD_SPI_FIFO_CLEAR,
@@ -106,8 +136,13 @@ static void amd_spi_clear_fifo_ptr(struct spi_master *master)

 static void amd_spi_set_opcode(struct spi_master *master, u8 cmd_opcode)
 {
-	amd_spi_setclear_reg32(master, AMD_SPI_CTRL0_REG, cmd_opcode,
-			       AMD_SPI_OPCODE_MASK);
+	struct amd_spi *amd_spi = spi_master_get_devdata(master);
+
+	if (!amd_spi->devtype_data->version)
+		amd_spi_setclear_reg32(master, AMD_SPI_CTRL0_REG, cmd_opcode,
+				       AMD_SPI_OPCODE_MASK);
+	else
+		amd_spi_writereg8(master, AMD_SPI_OPCODE_REG, cmd_opcode);
 }

 static inline void amd_spi_set_rx_count(struct spi_master *master,
@@ -126,17 +161,20 @@ static inline int amd_spi_busy_wait(struct amd_spi *amd_spi)
 {
 	bool spi_busy;
 	int timeout = 100000;
+	u32 status_reg = amd_spi->devtype_data->spi_status;

 	/* poll for SPI bus to become idle */
 	spi_busy = (ioread32((u8 __iomem *)amd_spi->io_remap_addr +
-		    AMD_SPI_CTRL0_REG) & AMD_SPI_BUSY) == AMD_SPI_BUSY;
+				status_reg) & AMD_SPI_BUSY) == AMD_SPI_BUSY;
+
 	while (spi_busy) {
 		usleep_range(10, 20);
 		if (timeout-- < 0)
 			return -ETIMEDOUT;

+		/* poll for SPI bus to become idle */
 		spi_busy = (ioread32((u8 __iomem *)amd_spi->io_remap_addr +
-			    AMD_SPI_CTRL0_REG) & AMD_SPI_BUSY) == AMD_SPI_BUSY;
+				status_reg) & AMD_SPI_BUSY) == AMD_SPI_BUSY;
 	}

 	return 0;
@@ -146,9 +184,16 @@ static void amd_spi_execute_opcode(struct spi_master *master)
 {
 	struct amd_spi *amd_spi = spi_master_get_devdata(master);

+	/*Check for busy wait*/
+	amd_spi_busy_wait(amd_spi);
+
 	/* Set ExecuteOpCode bit in the CTRL0 register */
-	amd_spi_setclear_reg32(master, AMD_SPI_CTRL0_REG, AMD_SPI_EXEC_CMD,
-			       AMD_SPI_EXEC_CMD);
+	if (!amd_spi->devtype_data->version)
+		amd_spi_setclear_reg32(master, AMD_SPI_CTRL0_REG, AMD_SPI_EXEC_CMD,
+				       AMD_SPI_EXEC_CMD);
+	else
+		amd_spi_setclear_reg8(master, AMD_SPI_CMD_TRIGGER_REG, AMD_SPI_TRIGGER_CMD,
+				      AMD_SPI_TRIGGER_CMD);

 	amd_spi_busy_wait(amd_spi);
 }
@@ -241,7 +286,8 @@ static int amd_spi_master_transfer(struct spi_master *master,
 	 * program the controller.
 	 */
 	amd_spi_fifo_xfer(amd_spi, master, msg);
-
+	if (amd_spi->devtype_data->version)
+		amd_spi_clear_chip(master);
 	return 0;
 }

@@ -266,6 +312,11 @@ static int amd_spi_probe(struct platform_device *pdev)
 		dev_err(dev, "error %d ioremap of SPI registers failed\n", err);
 		goto err_free_master;
 	}
+	amd_spi->devtype_data = device_get_match_data(dev);
+	if (!amd_spi->devtype_data) {
+		err = -ENODEV;
+		goto err_free_master;
+	}
 	dev_dbg(dev, "io_remap_address: %p\n", amd_spi->io_remap_addr);

 	/* Initialize the spi_master fields */
@@ -293,7 +344,10 @@ static int amd_spi_probe(struct platform_device *pdev)

 #ifdef CONFIG_ACPI
 static const struct acpi_device_id spi_acpi_match[] = {
-	{ "AMDI0061", 0 },
+	{ "AMDI0061",
+	.driver_data = (kernel_ulong_t)&spi_v1 },
+	{ "AMDI0062",
+	.driver_data = (kernel_ulong_t)&spi_v2 },
 	{},
 };
 MODULE_DEVICE_TABLE(acpi, spi_acpi_match);
--
2.25.1

[RESEND PATCH v2 2/2] spi:amd: Fix for transfer large size of data

[Nehal Bakulchandra Shah]

Hardware has 72 bytes of FIFO.This patch addresses the same by means
of software workaround.

Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Liang Liang <liang.liang@amd.com>
Signed-off-by: Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com>
---
 drivers/spi/spi-amd.c | 77 ++++++++++++++++++++++++++++++++++---------
 1 file changed, 62 insertions(+), 15 deletions(-)

diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c
index e65e7178d5fe..d608c27fe599 100644
--- a/drivers/spi/spi-amd.c
+++ b/drivers/spi/spi-amd.c
@@ -2,9 +2,10 @@
 //
 // AMD SPI controller driver
 //
-// Copyright (c) 2020, Advanced Micro Devices, Inc.
+// Copyright (c) 2020-2021, Advanced Micro Devices, Inc.
 //
-// Author: Sanjay R Mehta <sanju.mehta@amd.com>
+// Authors: Sanjay R Mehta <sanju.mehta@amd.com>
+//          Nehal Bakulchandra Shah <nehal-bakulchandra.shah@amd.com>
 
 #include <linux/acpi.h>
 #include <linux/init.h>
@@ -29,7 +30,7 @@
 #define AMD_SPI_TX_COUNT_REG	0x48
 #define AMD_SPI_RX_COUNT_REG	0x4B
 #define AMD_SPI_STATUS_REG	0x4C
-
+#define AMD_SPI_FIFO_SIZE	72
 #define AMD_SPI_MEM_SIZE	200
 
 /* M_CMD OP codes for SPI */
@@ -215,8 +216,8 @@ static inline int amd_spi_fifo_xfer(struct amd_spi *amd_spi,
 	u8 cmd_opcode;
 	u8 *buf = NULL;
 	u32 m_cmd = 0;
-	u32 i = 0;
-	u32 tx_len = 0, rx_len = 0;
+	u32 i = 0, it = 0, tx_index = 0, rx_index = 0;
+	u32 tx_len = 0, rx_len = 0, iters = 0, remaining =  0;
 
 	list_for_each_entry(xfer, &message->transfers,
 			    transfer_list) {
@@ -230,17 +231,40 @@ static inline int amd_spi_fifo_xfer(struct amd_spi *amd_spi,
 			tx_len = xfer->len - 1;
 			cmd_opcode = *(u8 *)xfer->tx_buf;
 			buf++;
+
+			tx_index = 0;
+			iters = tx_len / AMD_SPI_FIFO_SIZE;
+			remaining = tx_len % AMD_SPI_FIFO_SIZE;
+
+			for (it = 0; it < iters; it++) {
+				amd_spi_clear_fifo_ptr(master);
+				amd_spi_set_opcode(master, cmd_opcode);
+
+				amd_spi_set_tx_count(master, AMD_SPI_FIFO_SIZE);
+				/* Write data into the FIFO. */
+				for (i = 0; i < AMD_SPI_FIFO_SIZE; i++) {
+					iowrite8(buf[tx_index],
+						 ((u8 __iomem *)amd_spi->io_remap_addr +
+						 AMD_SPI_FIFO_BASE + i));
+					tx_index++;
+				}
+
+				/* Execute command */
+				amd_spi_execute_opcode(master);
+			}
+
+			amd_spi_clear_fifo_ptr(master);
 			amd_spi_set_opcode(master, cmd_opcode);
 
+			amd_spi_set_tx_count(master, remaining);
 			/* Write data into the FIFO. */
-			for (i = 0; i < tx_len; i++) {
-				iowrite8(buf[i],
+			for (i = 0; i < remaining; i++) {
+				iowrite8(buf[tx_index],
 					 ((u8 __iomem *)amd_spi->io_remap_addr +
-					 AMD_SPI_FIFO_BASE + i));
+					AMD_SPI_FIFO_BASE + i));
+				tx_index++;
 			}
 
-			amd_spi_set_tx_count(master, tx_len);
-			amd_spi_clear_fifo_ptr(master);
 			/* Execute command */
 			amd_spi_execute_opcode(master);
 		}
@@ -250,16 +274,38 @@ static inline int amd_spi_fifo_xfer(struct amd_spi *amd_spi,
 			 * FIFO
 			 */
 			rx_len = xfer->len;
+			rx_index = 0;
+			iters = rx_len / AMD_SPI_FIFO_SIZE;
+			remaining = rx_len % AMD_SPI_FIFO_SIZE;
 			buf = (u8 *)xfer->rx_buf;
-			amd_spi_set_rx_count(master, rx_len);
+
+			for (it = 0 ; it < iters; it++) {
+				amd_spi_clear_fifo_ptr(master);
+
+				amd_spi_set_rx_count(master, AMD_SPI_FIFO_SIZE);
+
+				/* Execute command */
+				amd_spi_execute_opcode(master);
+				/* Read data from FIFO to receive buffer  */
+				for (i = 0; i < AMD_SPI_FIFO_SIZE; i++) {
+					buf[rx_index] = amd_spi_readreg8(master, AMD_SPI_FIFO_BASE +
+									tx_len + i);
+					rx_index++;
+				}
+			}
+
 			amd_spi_clear_fifo_ptr(master);
+
+			amd_spi_set_rx_count(master, remaining);
+
 			/* Execute command */
 			amd_spi_execute_opcode(master);
 			/* Read data from FIFO to receive buffer  */
-			for (i = 0; i < rx_len; i++)
-				buf[i] = amd_spi_readreg8(master,
-							  AMD_SPI_FIFO_BASE +
-							  tx_len + i);
+			for (i = 0; i < remaining; i++) {
+				buf[rx_index] = amd_spi_readreg8(master, AMD_SPI_FIFO_BASE +
+								tx_len + i);
+				rx_index++;
+			}
 		}
 	}
 
@@ -365,4 +411,5 @@ module_platform_driver(amd_spi_driver);
 
 MODULE_LICENSE("Dual BSD/GPL");
 MODULE_AUTHOR("Sanjay Mehta <sanju.mehta@amd.com>");
+MODULE_AUTHOR("Nehal Bakulchandra Shah <nehal-bakulchandra.shah@amd.com>");
 MODULE_DESCRIPTION("AMD SPI Master Controller Driver");
-- 
2.25.1

Re: [RESEND PATCH v2 1/2] spi:amd: Add support for latest platform

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 3783 bytes --]

Hi Nehal,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on spi/for-next]
[also build test ERROR on v5.13 next-20210629]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Nehal-Bakulchandra-Shah/spi-amd-Support-for-new-generation-of-AMD-SOCs/20210630-004001
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
config: arm-randconfig-r025-20210628 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project aad87328fabff9382bac0b452c83934515e6d0c8)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm cross compiling tool for clang build
        # apt-get install binutils-arm-linux-gnueabi
        # https://github.com/0day-ci/linux/commit/dafe3f01e7cd854b133ee3feb6306e883d38fc15
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Nehal-Bakulchandra-Shah/spi-amd-Support-for-new-generation-of-AMD-SOCs/20210630-004001
        git checkout dafe3f01e7cd854b133ee3feb6306e883d38fc15
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=arm SHELL=/bin/bash drivers/spi/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/spi/spi-amd.c:141:28: error: incomplete definition of type 'struct amd_spi_devtype_data'
           if (!amd_spi->devtype_data->version)
                ~~~~~~~~~~~~~~~~~~~~~^
   drivers/spi/spi-amd.c:61:15: note: forward declaration of 'struct amd_spi_devtype_data'
           const struct amd_spi_devtype_data *devtype_data;
                        ^
   drivers/spi/spi-amd.c:164:40: error: incomplete definition of type 'struct amd_spi_devtype_data'
           u32 status_reg = amd_spi->devtype_data->spi_status;
                            ~~~~~~~~~~~~~~~~~~~~~^
   drivers/spi/spi-amd.c:61:15: note: forward declaration of 'struct amd_spi_devtype_data'
           const struct amd_spi_devtype_data *devtype_data;
                        ^
   drivers/spi/spi-amd.c:191:28: error: incomplete definition of type 'struct amd_spi_devtype_data'
           if (!amd_spi->devtype_data->version)
                ~~~~~~~~~~~~~~~~~~~~~^
   drivers/spi/spi-amd.c:61:15: note: forward declaration of 'struct amd_spi_devtype_data'
           const struct amd_spi_devtype_data *devtype_data;
                        ^
   drivers/spi/spi-amd.c:289:27: error: incomplete definition of type 'struct amd_spi_devtype_data'
           if (amd_spi->devtype_data->version)
               ~~~~~~~~~~~~~~~~~~~~~^
   drivers/spi/spi-amd.c:61:15: note: forward declaration of 'struct amd_spi_devtype_data'
           const struct amd_spi_devtype_data *devtype_data;
                        ^
   4 errors generated.


vim +141 drivers/spi/spi-amd.c

   136	
   137	static void amd_spi_set_opcode(struct spi_master *master, u8 cmd_opcode)
   138	{
   139		struct amd_spi *amd_spi = spi_master_get_devdata(master);
   140	
 > 141		if (!amd_spi->devtype_data->version)
   142			amd_spi_setclear_reg32(master, AMD_SPI_CTRL0_REG, cmd_opcode,
   143					       AMD_SPI_OPCODE_MASK);
   144		else
   145			amd_spi_writereg8(master, AMD_SPI_OPCODE_REG, cmd_opcode);
   146	}
   147	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 35281 bytes --]

Re: [RESEND PATCH v2 1/2] spi:amd: Add support for latest platform

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 2365 bytes --]

Hi Nehal,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on spi/for-next]
[also build test ERROR on v5.13 next-20210629]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Nehal-Bakulchandra-Shah/spi-amd-Support-for-new-generation-of-AMD-SOCs/20210630-004001
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
config: nios2-randconfig-r035-20210628 (attached as .config)
compiler: nios2-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/dafe3f01e7cd854b133ee3feb6306e883d38fc15
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Nehal-Bakulchandra-Shah/spi-amd-Support-for-new-generation-of-AMD-SOCs/20210630-004001
        git checkout dafe3f01e7cd854b133ee3feb6306e883d38fc15
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross O=build_dir ARCH=nios2 SHELL=/bin/bash drivers/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/spi/spi-amd.c: In function 'amd_spi_set_opcode':
>> drivers/spi/spi-amd.c:141:28: error: dereferencing pointer to incomplete type 'const struct amd_spi_devtype_data'
     141 |  if (!amd_spi->devtype_data->version)
         |                            ^~


vim +141 drivers/spi/spi-amd.c

   136	
   137	static void amd_spi_set_opcode(struct spi_master *master, u8 cmd_opcode)
   138	{
   139		struct amd_spi *amd_spi = spi_master_get_devdata(master);
   140	
 > 141		if (!amd_spi->devtype_data->version)
   142			amd_spi_setclear_reg32(master, AMD_SPI_CTRL0_REG, cmd_opcode,
   143					       AMD_SPI_OPCODE_MASK);
   144		else
   145			amd_spi_writereg8(master, AMD_SPI_OPCODE_REG, cmd_opcode);
   146	}
   147	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 17327 bytes --]