From: Jon Lin <jon.lin@rock-chips.com>
To: linux-spi@vger.kernel.org
Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org,
heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com,
yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org, p.yadav@ti.com,
macroalpha82@gmail.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, linux-clk@vger.kernel.org,
Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v11 03/10] arm64: dts: rockchip: Add SFC to PX30
Date: Wed, 7 Jul 2021 17:00:20 +0800 [thread overview]
Message-ID: <20210707090027.32608-4-jon.lin@rock-chips.com> (raw)
In-Reply-To: <20210707090027.32608-1-jon.lin@rock-chips.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add a devicetree entry for the Rockchip SFC for the PX30 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm64/boot/dts/rockchip/px30.dtsi | 38 ++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 09baa8a167ce..d854f2577067 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -966,6 +966,18 @@
status = "disabled";
};
+ sfc: spi@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xff3a0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
+ power-domains = <&power PX30_PD_MMC_NAND>;
+ status = "disabled";
+ };
+
nfc: nand-controller@ff3b0000 {
compatible = "rockchip,px30-nfc";
reg = <0x0 0xff3b0000 0x0 0x4000>;
@@ -1967,6 +1979,32 @@
};
};
+ sfc {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <1 RK_PA0 3 &pcfg_pull_none>,
+ <1 RK_PA1 3 &pcfg_pull_none>,
+ <1 RK_PA2 3 &pcfg_pull_none>,
+ <1 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <1 RK_PA0 3 &pcfg_pull_none>,
+ <1 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <1 RK_PA4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <1 RK_PB1 3 &pcfg_pull_none>;
+ };
+ };
+
lcdc {
lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
rockchip,pins =
--
2.17.1
next prev parent reply other threads:[~2021-07-07 9:00 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-07 9:00 [PATCH v11 00/10] Add Rockchip SFC(serial flash controller) support Jon Lin
2021-07-07 9:00 ` [PATCH v11 01/10] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Jon Lin
2021-07-07 9:00 ` [PATCH v11 02/10] spi: rockchip-sfc: add rockchip " Jon Lin
2021-07-07 9:00 ` Jon Lin [this message]
2021-07-07 9:00 ` [PATCH v11 04/10] clk: rockchip: rk3036: fix up the sclk_sfc parent error Jon Lin
2021-07-07 9:01 ` [PATCH v11 05/10] clk: rockchip: add dt-binding for hclk_sfc on rk3036 Jon Lin
2021-07-07 9:01 ` [PATCH v11 06/10] clk: rockchip: Add support " Jon Lin
2021-07-07 9:01 ` [PATCH v11 07/10] arm: dts: rockchip: Add SFC to RK3036 Jon Lin
2021-07-07 9:01 ` [PATCH v11 08/10] arm: dts: rockchip: Add SFC to RV1108 Jon Lin
2021-07-07 9:01 ` [PATCH v11 09/10] arm64: dts: rockchip: Add SFC to RK3308 Jon Lin
2021-07-07 9:02 ` [PATCH v11 10/10] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Jon Lin
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