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From: Boris Brezillon <boris.brezillon@collabora.com>
To: Apurva Nandan <a-nandan@ti.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Patrice Chotard <patrice.chotard@foss.st.com>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <p.yadav@ti.com>
Subject: Re: [PATCH v2 05/14] mtd: spinand: Add adjust_op() in manufacturer_ops to modify the ops for manufacturer specific changes
Date: Tue, 12 Oct 2021 08:54:35 +0200	[thread overview]
Message-ID: <20211012085435.1aedfb7f@collabora.com> (raw)
In-Reply-To: <20211011204619.81893-6-a-nandan@ti.com>

On Tue, 12 Oct 2021 02:16:10 +0530
Apurva Nandan <a-nandan@ti.com> wrote:

> Manufacturers might use a variation of standard SPI NAND flash
> instructions, e.g. Winbond W35N01JW changes the dummy cycle length for
> read register commands when in Octal DTR mode.
> 
> Add new function in manufacturer_ops: adjust_op(), which can be called
> to correct the spi_mem op for any alteration in the instruction made by
> the manufacturers. And hence, this function can also be used for
> incorporating variations of SPI instructions in Octal DTR mode.

Okay, so now we have reg accesses differing between vendors in DTR.
Looks like we should have an OP-table for non-IO commands too (similar
to the op_variants mechanism we have for IO commands), at least when
operating in DTR. The reg access path would just end up doing:

	struct spi_mem_op op =
		spinand->templates[spinand->protocol][cmd];

This way you get rid of all this live-patching/vendor-specific
adjustment (which is likely to get more and more complex since flash
vendors have a tendency of diverging from the common behavior), and
everything gets initialized at probe time.

> 
> Datasheet: https://www.winbond.com/export/sites/winbond/datasheet/W35N01JW_Datasheet_Brief.pdf
> 
> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
> ---
>  drivers/mtd/nand/spi/core.c | 3 +++
>  include/linux/mtd/spinand.h | 4 ++++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index 4da794ae728d..8e6cf7941a0f 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -61,6 +61,9 @@ static void spinand_patch_op(const struct spinand_device *spinand,
>  		op->data.buswidth = op_buswidth;
>  		op->data.dtr = op_is_dtr;
>  	}
> +
> +	if (spinand->manufacturer->ops->adjust_op)
> +		spinand->manufacturer->ops->adjust_op(op, spinand->reg_proto);
>  }
>  
>  static void spinand_patch_reg_op(const struct spinand_device *spinand,
> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> index f6093cd98d7b..ebb19b2cec84 100644
> --- a/include/linux/mtd/spinand.h
> +++ b/include/linux/mtd/spinand.h
> @@ -257,6 +257,8 @@ struct spinand_devid {
>  /**
>   * struct manufacurer_ops - SPI NAND manufacturer specific operations
>   * @init: initialize a SPI NAND device
> + * @adjust_op: modify the ops for any variation in their cmd, address, dummy or
> + *	       data phase by the manufacturer
>   * @cleanup: cleanup a SPI NAND device
>   *
>   * Each SPI NAND manufacturer driver should implement this interface so that
> @@ -264,6 +266,8 @@ struct spinand_devid {
>   */
>  struct spinand_manufacturer_ops {
>  	int (*init)(struct spinand_device *spinand);
> +	void (*adjust_op)(struct spi_mem_op *op,
> +			  const enum spinand_proto reg_proto);
>  	void (*cleanup)(struct spinand_device *spinand);
>  };
>  


  reply	other threads:[~2021-10-12  6:54 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-11 20:46 [PATCH v2 00/14] mtd: spinand: Add Octal DTR SPI (8D-8D-8D) mode support Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 01/14] spi: spi-mem: Add DTR templates for cmd, address, dummy and data phase Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 02/14] mtd: spinand: Add enum spinand_proto to indicate current SPI IO mode Apurva Nandan
2021-10-12  6:39   ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 03/14] mtd: spinand: Patch spi_mem_op for the SPI IO protocol using reg_proto Apurva Nandan
2021-10-12  6:40   ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 04/14] mtd: spinand: Fix odd byte addr and data phase in read and write reg op for Octal DTR mode Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 05/14] mtd: spinand: Add adjust_op() in manufacturer_ops to modify the ops for manufacturer specific changes Apurva Nandan
2021-10-12  6:54   ` Boris Brezillon [this message]
2021-10-11 20:46 ` [PATCH v2 06/14] mtd: spinand: Add macros for Octal DTR page read and write operations Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 07/14] mtd: spinand: Allow enabling Octal DTR mode in the core Apurva Nandan
2021-10-12  7:14   ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 08/14] mtd: spinand: winbond: Add support for write volatile configuration register op Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 09/14] mtd: spinand: winbond: Add octal_dtr_enable() for manufacturer_ops Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 10/14] mtd: spinand: Add support for Power-on-Reset (PoR) instruction Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 11/14] mtd: spinand: Perform Power-on-Reset on the flash in mtd_suspend() Apurva Nandan
2021-10-12  7:25   ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 12/14] mtd: spinand: Add adjust_op() in Winbond manufacturer_ops Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 13/14] mtd: spinand: winbond: Rename cache op_variants struct variable Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 14/14] mtd: spinand: winbond: Add support for Winbond W35N01JW SPI NAND flash Apurva Nandan

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