From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 906F8C433FE for ; Fri, 11 Feb 2022 03:53:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230167AbiBKDxd (ORCPT ); Thu, 10 Feb 2022 22:53:33 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:39920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237509AbiBKDxd (ORCPT ); Thu, 10 Feb 2022 22:53:33 -0500 Received: from mail-m17664.qiye.163.com (mail-m17664.qiye.163.com [59.111.176.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 776CF5F48; Thu, 10 Feb 2022 19:53:31 -0800 (PST) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m17664.qiye.163.com (Hmail) with ESMTPA id 5529D1401A6; Fri, 11 Feb 2022 11:43:51 +0800 (CST) From: Jon Lin To: broonie@kernel.org Cc: heiko@sntech.de, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jon Lin Subject: [PATCH v10 5/6] spi: rockchip: Support cs-gpio Date: Fri, 11 Feb 2022 11:43:41 +0800 Message-Id: <20220211034344.4130-5-jon.lin@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220211034344.4130-1-jon.lin@rock-chips.com> References: <20220211034344.4130-1-jon.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUhPN1dZLVlBSVdZDwkaFQgSH1lBWUMfGBhWQxoZSx4dTh9KQ0 NCVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWVVLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NSo6Vgw*Sj5PGh4MGAg2F08o TwkwCRpVSlVKTU9PTk5KS0hKTEhIVTMWGhIXVREUFVUXEhU7CRQYEFYYExILCFUYFBZFWVdZEgtZ QVlOQ1VJSVVMVUpKT1lXWQgBWUFJTEhNNwY+ X-HM-Tid: 0a7ee6e14ad7da2fkuws5529d1401a6 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org 1.Add standard cs-gpio support 2.Refer to spi-controller.yaml for details Signed-off-by: Jon Lin --- Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None drivers/spi/spi-rockchip.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 950d3bce443b..fbd750b1d28e 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -157,7 +157,8 @@ */ #define ROCKCHIP_SPI_MAX_TRANLEN 0xffff -#define ROCKCHIP_SPI_MAX_CS_NUM 2 +/* 2 for native cs, 2 for cs-gpio */ +#define ROCKCHIP_SPI_MAX_CS_NUM 4 #define ROCKCHIP_SPI_VER2_TYPE1 0x05EC0002 #define ROCKCHIP_SPI_VER2_TYPE2 0x00110002 @@ -245,11 +246,15 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) /* Keep things powered as long as CS is asserted */ pm_runtime_get_sync(rs->dev); - ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, - BIT(spi->chip_select)); + if (spi->cs_gpiod) + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); + else + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select)); } else { - ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, - BIT(spi->chip_select)); + if (spi->cs_gpiod) + ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); + else + ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select)); /* Drop reference from when we first asserted CS */ pm_runtime_put(rs->dev); -- 2.17.1