From: nandhini.srikandan@intel.com
To: fancer.lancer@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org, mgross@linux.intel.com,
kris.pan@intel.com, kenchappa.demakkanavar@intel.com,
furong.zhou@intel.com, mallikarjunappa.sangannavar@intel.com,
mahesh.r.vaidya@intel.com, nandhini.srikandan@intel.com,
rashmi.a@intel.com
Subject: [PATCH v5 4/4] spi: dw: Add support for Intel Thunder Bay SPI controller
Date: Wed, 6 Jul 2022 12:20:39 +0800 [thread overview]
Message-ID: <20220706042039.5763-5-nandhini.srikandan@intel.com> (raw)
In-Reply-To: <20220706042039.5763-1-nandhini.srikandan@intel.com>
From: Nandhini Srikandan <nandhini.srikandan@intel.com>
Add support for Intel Thunder Bay SPI controller, which uses DesignWare
DWC_ssi core and also add common init function for both Keem Bay and
Thunder Bay.
Signed-off-by: Nandhini Srikandan <nandhini.srikandan@intel.com>
---
drivers/spi/spi-dw-mmio.c | 8 ++++----
drivers/spi/spi-dw.h | 3 +--
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 5101c4c6017b..26c40ea6dd12 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -214,11 +214,10 @@ static int dw_spi_hssi_init(struct platform_device *pdev,
return 0;
}
-static int dw_spi_keembay_init(struct platform_device *pdev,
- struct dw_spi_mmio *dwsmmio)
+static int dw_spi_intel_init(struct platform_device *pdev,
+ struct dw_spi_mmio *dwsmmio)
{
dwsmmio->dws.ip = DW_HSSI_ID;
- dwsmmio->dws.caps = DW_SPI_CAP_KEEMBAY_MST;
return 0;
}
@@ -349,7 +348,8 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
{ .compatible = "amazon,alpine-dw-apb-ssi", .data = dw_spi_alpine_init},
{ .compatible = "renesas,rzn1-spi", .data = dw_spi_pssi_init},
{ .compatible = "snps,dwc-ssi-1.01a", .data = dw_spi_hssi_init},
- { .compatible = "intel,keembay-ssi", .data = dw_spi_keembay_init},
+ { .compatible = "intel,keembay-ssi", .data = dw_spi_intel_init},
+ { .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},
{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
{ /* end of table */}
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 8b8f924ac410..9e8eb2b52d5c 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -31,8 +31,7 @@
/* DW SPI controller capabilities */
#define DW_SPI_CAP_CS_OVERRIDE BIT(0)
-#define DW_SPI_CAP_KEEMBAY_MST BIT(1)
-#define DW_SPI_CAP_DFS32 BIT(2)
+#define DW_SPI_CAP_DFS32 BIT(1)
/* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
#define DW_SPI_CTRLR0 0x00
--
2.17.1
next prev parent reply other threads:[~2022-07-06 4:26 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-06 4:20 [PATCH v5 0/4] Add support for Intel Thunder Bay SPI controller nandhini.srikandan
2022-07-06 4:20 ` [PATCH v5 1/4] spi: dw: Fix IP-core versions macro nandhini.srikandan
2022-07-06 11:58 ` Mark Brown
2022-07-06 14:56 ` Srikandan, Nandhini
2022-07-06 14:59 ` Mark Brown
2022-07-07 13:29 ` Serge Semin
2022-07-06 4:20 ` [PATCH v5 2/4] dt-bindings: spi: Add bindings for Intel Thunder Bay SoC nandhini.srikandan
2022-07-06 14:48 ` Rob Herring
2022-07-07 13:22 ` Serge Semin
2022-07-06 4:20 ` [PATCH v5 3/4] spi: dw: Add support for master mode selection for DWC SSI controller nandhini.srikandan
2022-07-07 13:32 ` Serge Semin
2022-07-06 4:20 ` nandhini.srikandan [this message]
2022-07-07 13:34 ` [PATCH v5 4/4] spi: dw: Add support for Intel Thunder Bay SPI controller Serge Semin
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