Re: [PATCH 3/3] spi: dw_spi: refine the IRQ mode working flow

[Jean-Hugues Deschenes <jean-hugues.deschenes-YGVykHU+fedBDgjK7y7TUQ@public.gmane.org>]

Feng Tang wrote:
> On Tue, 19 Jan 2010 22:20:53 +0800
> Jean-Hugues Deschenes <jean-hugues.deschenes-YGVykHU+fedBDgjK7y7TUQ@public.gmane.org> wrote:
>
>   
>> Hi Feng,
>>
>> Feng Tang wrote:
>>     
>>>  	dws->num_cs = 4;
>>>  	dws->max_freq = 25000000;	/* for Moorestwon */
>>>  	dws->irq = pdev->irq;
>>> +	dws->fifo_len = 40;		/* FIFO has 40 words
>>> buffer */
>>>
>>>  	ret = dw_spi_add_host(dws);
>>>
>>>
>>>       
>> Since we'll be sharing some of our init code, as well as some of our
>> init values, would it be a good idea to move:
>> "dws->num_cs = 4;" and "dws->fifo_len = 40;"
>>
>> into dw_spi_add_host(), if no values were provided by the caller?
>>     
>
> For FIFO depth, it depends on each specific implementation based on DW core,
> and interface driver would better set it. If fifo_len is not set in IRQ mode,
> core driver will set 0 as the TX interrupt threshold, which will only trigger
> the TXE IRQ when the TX FIFO is fully empty. This is my design thought.
>   
I'm sorry; At first, I was under the impression that it referred to a 
software FIFO.
...So could this be auto-detected from the [RT]XFTLR registers, then?


------------------------------------------------------------------------------
Throughout its 18-year history, RSA Conference consistently attracts the
world's best and brightest in the field, creating opportunities for Conference
attendees to learn about information security's most important issues through
interactions with peers, luminaries and emerging and established companies.
http://p.sf.net/sfu/rsaconf-dev2dev