linux-spi.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* PATCH [1/1] SPI: AMBA_PL022: Limit TX FIFO fills based on current RX FIFO used
@ 2010-01-20 18:38 Kevin Wells
       [not found] ` <083DF309106F364B939360100EC290F805C4BF1E97-SIPbe8o7cfX8DdpCu65jn8FrZmdRls4ZQQ4Iyu8u01E@public.gmane.org>
  0 siblings, 1 reply; 5+ messages in thread
From: Kevin Wells @ 2010-01-20 18:38 UTC (permalink / raw)
  To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f

Added logic to cap TX FIFO fill size based on current free RX
FIFO entries instead of TX status flags. This is to prevent
an issue with RX FIFO overflows 

Signed-off-by: Kevin Wells <kevin.wells-3arQi8VN3Tc@public.gmane.org>
---
 drivers/spi/amba-pl022.c |   18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c
index ff5bbb9..9aeb681 100644
--- a/drivers/spi/amba-pl022.c
+++ b/drivers/spi/amba-pl022.c
@@ -363,6 +363,7 @@ struct pl022 {
 	void				*rx_end;
 	enum ssp_reading		read;
 	enum ssp_writing		write;
+	u32				exp_fifo_level;
 };
 
 /**
@@ -501,6 +502,9 @@ static int flush(struct pl022 *pl022)
 		while (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE)
 			readw(SSP_DR(pl022->virtbase));
 	} while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_BSY) && limit--);
+
+	pl022->exp_fifo_level = 0;
+
 	return limit;
 }
 
@@ -583,10 +587,9 @@ static void readwriter(struct pl022 *pl022)
 	 * errons in 8bit wide transfers on ARM variants (just 8 words
 	 * FIFO, means only 8x8 = 64 bits in FIFO) at least.
 	 *
-	 * FIXME: currently we have no logic to account for this.
-	 * perhaps there is even something broken in HW regarding
-	 * 8bit transfers (it doesn't fail on 16bit) so this needs
-	 * more investigation...
+	 * To prevent this issue, the TX FIFO is only filled to the
+	 * unused RX FIFO fill length, regardless of what the TX
+	 * FIFO status flag indicates.
 	 */
 	dev_dbg(&pl022->adev->dev,
 		"%s, rx: %p, rxend: %p, tx: %p, txend: %p\n",
@@ -613,11 +616,12 @@ static void readwriter(struct pl022 *pl022)
 			break;
 		}
 		pl022->rx += (pl022->cur_chip->n_bytes);
+		pl022->exp_fifo_level--;
 	}
 	/*
-	 * Write as much as you can, while keeping an eye on the RX FIFO!
+	 * Write as much as possible up to the RX FIFO size
 	 */
-	while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_TNF)
+	while ((pl022->exp_fifo_level < pl022->vendor->fifodepth)
 	       && (pl022->tx < pl022->tx_end)) {
 		switch (pl022->write) {
 		case WRITING_NULL:
@@ -634,6 +638,7 @@ static void readwriter(struct pl022 *pl022)
 			break;
 		}
 		pl022->tx += (pl022->cur_chip->n_bytes);
+		pl022->exp_fifo_level++;
 		/*
 		 * This inner reader takes care of things appearing in the RX
 		 * FIFO as we're transmitting. This will happen a lot since the
@@ -660,6 +665,7 @@ static void readwriter(struct pl022 *pl022)
 				break;
 			}
 			pl022->rx += (pl022->cur_chip->n_bytes);
+			pl022->exp_fifo_level--;
 		}
 	}
 	/*
-- 
1.5.6.5


------------------------------------------------------------------------------
Throughout its 18-year history, RSA Conference consistently attracts the
world's best and brightest in the field, creating opportunities for Conference
attendees to learn about information security's most important issues through
interactions with peers, luminaries and emerging and established companies.
http://p.sf.net/sfu/rsaconf-dev2dev

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: PATCH [1/1] SPI: AMBA_PL022: Limit TX FIFO fills based on current RX FIFO used
       [not found] ` <083DF309106F364B939360100EC290F805C4BF1E97-SIPbe8o7cfX8DdpCu65jn8FrZmdRls4ZQQ4Iyu8u01E@public.gmane.org>
@ 2010-01-22 12:56   ` Linus Walleij
       [not found]     ` <63386a3d1001220456p484efc7fm811ae2240698cbdf-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  0 siblings, 1 reply; 5+ messages in thread
From: Linus Walleij @ 2010-01-22 12:56 UTC (permalink / raw)
  To: Kevin Wells
  Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Russell King

2010/1/20 Kevin Wells <kevin.wells-3arQi8VN3Tc@public.gmane.org>:

> Added logic to cap TX FIFO fill size based on current free RX
> FIFO entries instead of TX status flags. This is to prevent
> an issue with RX FIFO overflows

Excellent patch and works like a charm on the U300. My loopback code
would generate
spurious overfill errors before and now it *never* fails so you hit
exactly the right spot.
I remember being intrigued by this when I worked on the driver and now
it is finally
nailed.

As some sort of maintainer of this file I have signed it off and put
it into Russells
patch tracker for inclusion, OK? See;
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5893/1

Linus Walleij

------------------------------------------------------------------------------
Throughout its 18-year history, RSA Conference consistently attracts the
world's best and brightest in the field, creating opportunities for Conference
attendees to learn about information security's most important issues through
interactions with peers, luminaries and emerging and established companies.
http://p.sf.net/sfu/rsaconf-dev2dev

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: PATCH [1/1] SPI: AMBA_PL022: Limit TX FIFO fills based on current RX FIFO used
       [not found]     ` <63386a3d1001220456p484efc7fm811ae2240698cbdf-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2010-02-03 17:48       ` Grant Likely
       [not found]         ` <fa686aa41002030948g6359ef3o4c3a7b265490b93f-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  0 siblings, 1 reply; 5+ messages in thread
From: Grant Likely @ 2010-02-03 17:48 UTC (permalink / raw)
  To: Linus Walleij
  Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Russell King

On Fri, Jan 22, 2010 at 5:56 AM, Linus Walleij
<linus.ml.walleij-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> 2010/1/20 Kevin Wells <kevin.wells-3arQi8VN3Tc@public.gmane.org>:
>
>> Added logic to cap TX FIFO fill size based on current free RX
>> FIFO entries instead of TX status flags. This is to prevent
>> an issue with RX FIFO overflows
>
> Excellent patch and works like a charm on the U300. My loopback code
> would generate
> spurious overfill errors before and now it *never* fails so you hit
> exactly the right spot.
> I remember being intrigued by this when I worked on the driver and now
> it is finally
> nailed.
>
> As some sort of maintainer of this file I have signed it off and put
> it into Russells
> patch tracker for inclusion, OK? See;
> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5893/1

I'm actively maintaining SPI now.  In general, I'd prefer SPI patches
to go through the SPI tree, unless there are commit ordering issues
with arch code.  I'm tracking SPI patches with patchwork:

http://patchwork.kernel.org/project/spi-devel-general/list/

Thanks,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

------------------------------------------------------------------------------
The Planet: dedicated and managed hosting, cloud storage, colocation
Stay online with enterprise data centers and the best network in the business
Choose flexible plans and management services without long-term contracts
Personal 24x7 support from experience hosting pros just a phone call away.
http://p.sf.net/sfu/theplanet-com

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: PATCH [1/1] SPI: AMBA_PL022: Limit TX FIFO fills based on current RX FIFO used
       [not found]         ` <fa686aa41002030948g6359ef3o4c3a7b265490b93f-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2010-02-03 22:15           ` Linus Walleij
  2010-05-19 10:56           ` Linus Walleij
  1 sibling, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2010-02-03 22:15 UTC (permalink / raw)
  To: Grant Likely
  Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Russell King

2010/2/3 Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>:

> I'm actively maintaining SPI now.  In general, I'd prefer SPI patches
> to go through the SPI tree, unless there are commit ordering issues
> with arch code.

Sorry, will queue them in your tree next time, and thanks for picking
up SPI.

Yours,
Linus Walleij

------------------------------------------------------------------------------
The Planet: dedicated and managed hosting, cloud storage, colocation
Stay online with enterprise data centers and the best network in the business
Choose flexible plans and management services without long-term contracts
Personal 24x7 support from experience hosting pros just a phone call away.
http://p.sf.net/sfu/theplanet-com

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: PATCH [1/1] SPI: AMBA_PL022: Limit TX FIFO fills based on current RX FIFO used
       [not found]         ` <fa686aa41002030948g6359ef3o4c3a7b265490b93f-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  2010-02-03 22:15           ` Linus Walleij
@ 2010-05-19 10:56           ` Linus Walleij
  1 sibling, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2010-05-19 10:56 UTC (permalink / raw)
  To: Grant Likely; +Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f

2010/2/3 Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>:

>> As some sort of maintainer of this file I have signed it off and put
>> it into Russells
>> patch tracker for inclusion, OK? See;
>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5893/1
>
> I'm actively maintaining SPI now.  In general, I'd prefer SPI patches
> to go through the SPI tree, unless there are commit ordering issues
> with arch code.

Is this working out? The patches in patchwork will be in for the merge
window, no?

Not that I feel it's a disaster if they don't get in now, it's mainly
that I want to
know if I can help out in some way.

Yours,
Linus Walleij

------------------------------------------------------------------------------

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2010-05-19 10:56 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-01-20 18:38 PATCH [1/1] SPI: AMBA_PL022: Limit TX FIFO fills based on current RX FIFO used Kevin Wells
     [not found] ` <083DF309106F364B939360100EC290F805C4BF1E97-SIPbe8o7cfX8DdpCu65jn8FrZmdRls4ZQQ4Iyu8u01E@public.gmane.org>
2010-01-22 12:56   ` Linus Walleij
     [not found]     ` <63386a3d1001220456p484efc7fm811ae2240698cbdf-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2010-02-03 17:48       ` Grant Likely
     [not found]         ` <fa686aa41002030948g6359ef3o4c3a7b265490b93f-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2010-02-03 22:15           ` Linus Walleij
2010-05-19 10:56           ` Linus Walleij

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).