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From: Markus Koch <markus@notsyncing.net>
To: linux-spi@vger.kernel.org
Subject: Active-high chip select with BCM2835 SPI
Date: Sun, 14 Feb 2021 13:33:27 +0100	[thread overview]
Message-ID: <876a6779-5187-6313-3dc0-558d6efdee9a@notsyncing.net> (raw)

Hi,

I noticed that setting `spi-cs-high` in the DT, or setting the `SPI_CS_HIGH` mode flag when using spidev on my Raspberry Pi does not have any effect. It always uses an active-low chip select. However, spidev's `ioctl(fd, SPI_IOC_RD_MODE, &mode)` always reports the CS as high-active (even if I don't configure it to high).

After looking through the source code for a bit, I think that this behavior applies to all GPIO-based CS implementations. So I have a few questions about this:

1. Is this behavior expected?
	I think (haven't tried yet) the only way to actually configure the CS polarity is by reconfiguring the GPIO entry in the DT that defines the chip select polarity to be GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW.

2. Would it be a good idea to implement a feature that changes the GPIO polarity depending on the `SPI_CS_HIGH` bit?
	Where would be the right place? (`spi_setup` in spi.c maybe?)

If this is indeed a problem, I'll look into preparing a patch. But I have a feeling this is expected behavior and I'm just overlooking something...

Thanks!
Markus

                 reply	other threads:[~2021-02-14 12:36 UTC|newest]

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