From: Raju Sana <venkat.rajuece-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Ben Gamari <bgamari.foss-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: David Brownell
Eric Miao <eric.miao-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
Subject: Re: McSPI questions pertaining to GPIO chip select support
Date: Tue, 30 Aug 2011 15:44:22 +0530 [thread overview]
Message-ID: <CA+dZkakw9COsETWZkvMzp2v-ymfQdDEqp3jJuhWbrRTTTjpbGQ@mail.gmail.com> (raw)
Could you please post your patch as I am also working the similar design.
I need to modify the existing McSPI driver to support 3 codec chips.
On Thu, Jan 28, 2010 at 9:40 AM, Ben Gamari <bgamari.foss-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Hey all!
> Recently I've been thinking about adding support to the McSPI driver for
> using GPIO pins as chip selects. As a starting point, I've browsed the
> driver source trying to identify what changes would be necessary to add
> this support. It seems like the rough idea is,
> a) add a cs_gpio field to the device struct (omap2_mcspi)
> b) modify omap2_mcspi_force_cs() to use cs_gpio instead of the
> CHxCONF[FORCE] bit if cs_gpio is valid
> Unfortunately, I'm having a bit of difficulty seeing how the existing
> configuration works. In master mode, it seems that the controller is
> configured in single forced channel mode (MCSPI_MODULECTRL_SINGLE). As
> far as I can tell, this means that the driver is responsible for
> managing the chip selects through the MCSPI_CHxCONF[FORCE] bits. It
> seems that this is ideal as little will need to be changed to
> incorporate GPIO CS support.
> Nevertheless, the timing of the various operations isn't making sense to
> me. As far as I understand it, the callgraph is as follows,
> loop over messages
> loop over transfers:
> configure bus parameters
> if (!cs_active) cs = 1
> if (dma):
> if (cs_change) cs = 0
> end loop
> if (cs_active) cs = 0
> end loop
> It seems that omap2_mcspi_set_enable() is called to enable the channel
> (MCSPI_CHCTRLx[EN] is set) before force_cs() is called. If I'm
> interpreting the hardware documentation correctly, the enable bit (among
> other things) starts the SPI clock, meaning that the chip will begin
> clocking out zeros to the device before CS is brought high.
> Furthermore, even after CS is brought high, it seems there could be a
> fair amount of time before the chip begins actually clocking out valid
> As I am writing this, it now occurs to me that perhaps the chip doesn't
> start SPI_CLK until it has data to send. It seems that if this were the
> case my concerns would be resolved. However, it is not at all clear that
> this is the case from the documentation. When exactly does the
> controller start the bus clock? Is this stated explicitly anywhere in
> the documentation?
> Any input you could offer would be greatly appreciated.
> Thanks for your time.
> - Ben
> P.S. The more and more I think about it, it seems like my hypothesis is
> the only logical behavior. It would be great if someone could confirm my
> suspicions, however. It really seems like this should be in the
> documentation either way.
> P.P.S. I apologize if this is something someone familiar with SPI should
> just know. My knowledge is a little spotty on this sort of thing.
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next prev parent reply other threads:[~2011-08-30 10:14 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-20 19:47 (no subject) Ben Gamari
2010-01-21 0:04 ` Ben Dooks
2010-01-21 0:04 ` (no subject) Ben Dooks
2010-01-21 0:04 ` Ben Dooks
2010-01-22 15:53 ` Re: Ben Gamari
2010-01-28 4:10 ` McSPI questions pertaining to GPIO chip select support Ben Gamari
[not found] ` <1264651770-sup-5197@ben-laptop>
2010-01-28 4:15 ` Bill Gatliff
2010-01-28 4:25 ` Ben Gamari
2010-01-28 4:27 ` Bill Gatliff
2010-01-28 4:33 ` jassi brar
[not found] ` <1b68c6791001272033q60dd31dbif4de285cd9bac83d-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2010-01-29 0:32 ` Ben Gamari
2010-01-29 1:09 ` jassi brar
[not found] ` <1b68c6791001281709l7d11da30lee486632e85b99cb-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2010-01-29 1:58 ` Ben Gamari
2010-12-21 17:56 ` [RFC PATCH] GPIO chip select support for McSPI Ben Gamari
2010-12-21 17:56 ` [PATCH] mcspi: Add support for GPIO chip select lines Ben Gamari
[not found] ` <firstname.lastname@example.org>
2010-12-23 19:59 ` Tony Lindgren
2010-12-23 21:38 ` Grant Likely
2010-12-23 23:09 ` Ben Gamari
2010-12-24 0:37 ` Grant Likely
2010-12-24 2:27 ` Ben Gamari
2010-12-24 3:28 ` Grant Likely
2010-12-24 6:05 ` Ben Gamari
2011-02-12 8:33 ` Grant Likely
2011-02-13 22:07 ` Ben Gamari
2011-08-30 10:14 ` Raju Sana [this message]
2011-08-30 13:50 ` GPIO chip select support Ben Gamari
2011-08-30 13:50 ` [PATCH] mcspi: Add support for GPIO chip select lines Ben Gamari
2011-08-30 13:52 ` [PATCH] beagledaq: Hack in cs_gpios Ben Gamari
[not found] ` <1314712343-27367-1-git-send-email-bgamari.foss-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2011-09-05 12:42 ` Raju Sana
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