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From: Andy Shevchenko <andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Cc: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	chenxiang66-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
	Linux Kernel Mailing List
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	liusimin4-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
	Linuxarm <linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
	linux-spi <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Marek Vasut <marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"open list:MEMORY TECHNOLOGY..."
	<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	tudor.ambarus-UWL1GkI3JZL3oGB3hsPCZA@public.gmane.org,
	Jiancheng Xue
	<xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
	Mika Westerberg
	<mika.westerberg-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
	wanghuiqiang
	<wanghuiqiang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
	fengsheng5-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Fri, 31 Jan 2020 13:39:19 +0200	[thread overview]
Message-ID: <CAHp75Ve=ZwJe2XV8Y1UN6sMe1ZHOBwUtRUD=aGqhR4Gc7BNUcg@mail.gmail.com> (raw)
In-Reply-To: <0252a76d-7e2b-2c70-8b1b-0d041d972098-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>

On Fri, Jan 31, 2020 at 12:08 PM John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> wrote:
>
> On 13/01/2020 14:34, Andy Shevchenko wrote:
> > On Mon, Jan 13, 2020 at 02:27:54PM +0000, Mark Brown wrote:
> >> On Mon, Jan 13, 2020 at 04:17:32PM +0200, Andy Shevchenko wrote:
> >>> On Mon, Jan 13, 2020 at 4:07 PM Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> >>>> On Mon, Jan 13, 2020 at 01:01:06PM +0000, John Garry wrote:
> >>>>> On 13/01/2020 11:42, Mark Brown wrote:
> >>
> >>>>>> The idiomatic approach appears to be for individual board vendors
> >>>>>> to allocate IDs, you do end up with multiple IDs from multiple
> >>>>>> vendors for the same thing.
> >>
> >>>>> But I am not sure how appropriate that same approach would be for some 3rd
> >>>>> party memory part which we're simply wiring up on our board. Maybe it is.
> >>
> >>>> It seems to be quite common for Intel reference designs to assign
> >>>> Intel IDs to non-Intel parts on the board (which is where I
> >>>> became aware of this practice).
> >>
> >>> Basically vendor of component in question is responsible for ID, but
> >>> it seems they simple don't care.
> >>
> >> AFAICT a lot of the time it seems to be that whoever is writing
> >> the software ends up assigning an ID, that may not be the silicon
> >> vendor.
> >
> > ...which is effectively abusing the ACPI ID allocation procedure.
> >
> > (And yes, Intel itself did it in the past — see badly created ACPI IDs
> >   in the drivers)
> >
>
> Hi Mark,
>
> About this topic of ACPI having no method to describe device buswidth in
> the resource descriptor, it may be an idea for me to raise a Tianocore
> feature request @ https://bugzilla.tianocore.org/
>

The 19.6.126 describes the SPI resource, in particular:

---8<---8<---
DataBitLength is the size, in bits, of the smallest transfer unit for
this connection. _LEN is automatically
created to refer to this portion of the resource descriptor.
---8<---8<---

Is it what you are looking for? (As far as I know most of the
firmwares simple abuse this field among others)

> There seems to be an avenue there for raising new features for the spec.
> I (or my org) can't participate in AWSG.

But have you read 19.6.126?

> I would have no concrete proposal for spec update for now, though.
> Hopefully others with more expertise could contribute.


-- 
With Best Regards,
Andy Shevchenko

  parent reply	other threads:[~2020-01-31 11:39 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2020-01-16 11:03   ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2020-01-09 15:54   ` John Garry
2020-01-09 21:28     ` Mark Brown
     [not found]       ` <20200109212842.GK3702-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-10 11:55         ` John Garry
     [not found]           ` <df67b562-7d82-19f6-7581-680190a7772d-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 14:07             ` Mark Brown
2020-01-10 14:58               ` John Garry
2020-01-10 15:12                 ` Mark Brown
2020-01-10 16:09                   ` John Garry
     [not found]                 ` <6db83881-927c-d11c-9c77-23a45892ddab-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 19:31                   ` Andy Shevchenko
2020-01-13 10:09                     ` John Garry
2020-01-13 11:42                       ` Mark Brown
2020-01-13 13:01                         ` John Garry
2020-01-13 14:06                           ` Mark Brown
     [not found]                             ` <20200113140627.GJ3897-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-13 14:17                               ` Andy Shevchenko
     [not found]                                 ` <CAHp75VfepiiVFLLmCwdBS0Z6tmR+XKBaOLg1qPPuz1McLjS=4Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-13 14:27                                   ` Mark Brown
     [not found]                                     ` <20200113142754.GL3897-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-13 14:34                                       ` Andy Shevchenko
2020-01-31 10:08                                         ` John Garry
     [not found]                                           ` <0252a76d-7e2b-2c70-8b1b-0d041d972098-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-31 11:39                                             ` Andy Shevchenko [this message]
     [not found]                                               ` <CAHp75Ve=ZwJe2XV8Y1UN6sMe1ZHOBwUtRUD=aGqhR4Gc7BNUcg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-31 12:03                                                 ` John Garry
     [not found]                                                   ` <136bd652-dcb9-3efa-a92f-2263cbf840ad-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-31 15:46                                                     ` Andy Shevchenko
     [not found]                                                       ` <CAHp75Vd=TY0tPfSHMSLTh1Pgg-E7MCP5Gym1yjpLgH0Tx-2xSg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-31 16:26                                                         ` John Garry
2020-02-01 11:34                                                           ` Mark Brown
2020-02-01 11:32                                                       ` Mark Brown
2020-01-10 19:59   ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
     [not found]   ` <1575900490-74467-4-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 19:59     ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:56   ` Mark Brown

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