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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Mason Yang <masonccyang@mxic.com.tw>
Cc: Boris Brezillon <bbrezillon@kernel.org>,
	Mark Brown <broonie@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Simon Horman <horms@verge.net.au>,
	juliensu@mxic.com.tw,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	linux-spi <linux-spi@vger.kernel.org>,
	Marek Vasut <marek.vasut@gmail.com>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	zhengxunli@mxic.com.tw
Subject: Re: [PATCH v6 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings
Date: Fri, 18 Jan 2019 11:39:57 +0100	[thread overview]
Message-ID: <CAMuHMdXeYubQPJrDE_hUf-5hAVA7rMrDynbg3rCW3TpXEpVu+Q@mail.gmail.com> (raw)
In-Reply-To: <OFBD5366C8.433ADACB-ON48258386.00336667-48258386.00340E20@mxic.com.tw>

Hi Mason,

On Fri, Jan 18, 2019 at 10:28 AM <masonccyang@mxic.com.tw> wrote:
> I modified this dts to:
>
> Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
>  --------------------------------------------------------------------
>
>  Required properties:
>  - compatible: should be an SoC-specific compatible value, followed by
>                "renesas,rcar-gen3-rpc" as a fallback.

Please list the supported SoC-specific compatible values, so
scripts/checkpatch.pl
can validate patches adding RPC device nodes to DTS files.

>  - #address-cells: should be 1
>  - #size-cells: should be 0
>  - reg: should contain three register areas:
>          first for the base address of rpc-if registers,
>          second for the direct mapping read mode and
>          third for the write buffer area.
>  - reg-names: should contain "regs", "dirmap" and "wbuf"
>  - clock-names: should contain "rpc"
>  - clocks: should contain 1 entries for the module's clock

Please revert the order of clocks and clock-names, cfr. reg and reg-names.

>  Example:
>
>          rpc: rpc@ee200000 {
>                  compatible = "renesas,r8a7795-rpc", "renesas,rcar-gen3-rpc";
>                  reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>,
>                        <0 0xee208000 0 0x100>;
>                  reg-names = "regs", "dirmap", "wbuf";
>                  clocks = <&cpg CPG_MOD 917>;
>                  power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
>                  resets = <&cpg 917>;
>                  clock-names = "rpc";

Please move clock-names just below clocks.

>                  #address-cells = <1>;
>                  #size-cells = <0>;
>
>                  flash@0 {
>                          compatible = "jedec,spi-nor";
>                          reg = <0>;
>                          spi-max-frequency = <40000000>;
>                          spi-tx-bus-width = <1>;
>                          spi-rx-bus-width = <1>;
>                  };
>          };
>
>
> If it is ok and I will submit it in [PATCH v7 2/2].

Looks good, with the above changes made.

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  parent reply	other threads:[~2019-01-18 10:39 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-18  5:54 [PATCH v6 0/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI driver Mason Yang
2019-01-18  5:54 ` [PATCH v6 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver Mason Yang
2019-01-18  8:25   ` Geert Uytterhoeven
2019-01-18 19:43   ` Sergei Shtylyov
     [not found]     ` <OFE50FED81.5C117A38-ON48258389.0012FCE2-48258389.00139BD2@mxic.com.tw>
2019-01-21 18:14       ` Sergei Shtylyov
2019-01-18  5:54 ` [PATCH v6 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Mason Yang
2019-01-18  6:16   ` Marek Vasut
     [not found]     ` <OF914E6438.79205FE6-ON48258386.002973E8-48258386.002A41F0@mxic.com.tw>
2019-01-18  7:46       ` Marek Vasut
2019-01-18  8:23     ` Sergei Shtylyov
2019-01-18  8:03   ` Geert Uytterhoeven
2019-01-18  8:08     ` Marek Vasut
2019-01-18  8:10       ` Geert Uytterhoeven
2019-01-18  8:12         ` Marek Vasut
     [not found]     ` <OFBD5366C8.433ADACB-ON48258386.00336667-48258386.00340E20@mxic.com.tw>
2019-01-18 10:39       ` Geert Uytterhoeven [this message]
2019-01-18  8:18   ` Sergei Shtylyov

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