From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> To: John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> Cc: andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Subject: Applied "spi: Allow SPI controller override device buswidth" to the spi tree Date: Fri, 28 Feb 2020 18:25:37 +0000 [thread overview] Message-ID: <applied-1582903131-160033-2-git-send-email-john.garry@huawei.com> (raw) In-Reply-To: <1582903131-160033-2-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> The patch spi: Allow SPI controller override device buswidth has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From ea23578611dce2eeaf31dcfe12cd7130cf3d1411 Mon Sep 17 00:00:00 2001 From: John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> Date: Fri, 28 Feb 2020 23:18:49 +0800 Subject: [PATCH] spi: Allow SPI controller override device buswidth Currently ACPI firmware description for a SPI device does not have any method to describe the data buswidth on the board. So even through the controller and device may support higher modes than standard SPI, it cannot be assumed that the board does - as such, that device is limited to standard SPI in such a circumstance. As a workaround, allow the controller driver supply buswidth override bits, which are used inform the core code that the controller driver knows the buswidth supported on that board for that device. A host controller driver might know this info from DMI tables, for example. Signed-off-by: John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> Link: https://lore.kernel.org/r/1582903131-160033-2-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- drivers/spi/spi.c | 4 +++- include/linux/spi/spi.h | 3 +++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 38b4c78df506..292f26807b41 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -510,6 +510,7 @@ struct spi_device *spi_alloc_device(struct spi_controller *ctlr) spi->dev.bus = &spi_bus_type; spi->dev.release = spidev_release; spi->cs_gpio = -ENOENT; + spi->mode = ctlr->buswidth_override_bits; spin_lock_init(&spi->statistics.lock); @@ -2181,9 +2182,10 @@ static acpi_status acpi_register_spi_device(struct spi_controller *ctlr, return AE_NO_MEMORY; } + ACPI_COMPANION_SET(&spi->dev, adev); spi->max_speed_hz = lookup.max_speed_hz; - spi->mode = lookup.mode; + spi->mode |= lookup.mode; spi->irq = lookup.irq; spi->bits_per_word = lookup.bits_per_word; spi->chip_select = lookup.chip_select; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 6d16ba01ff5a..600e3793303e 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -481,6 +481,9 @@ struct spi_controller { /* spi_device.mode flags understood by this controller driver */ u32 mode_bits; + /* spi_device.mode flags override flags for this controller */ + u32 buswidth_override_bits; + /* bitmask of supported bits_per_word for transfers */ u32 bits_per_word_mask; #define SPI_BPW_MASK(bits) BIT((bits) - 1) -- 2.20.1
next prev parent reply other threads:[~2020-02-28 18:25 UTC|newest] Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-28 15:18 [PATCH RFC 0/3] spi/HiSilicon v3xx: Support dual and quad mode through DMI quirks John Garry 2020-02-28 15:18 ` [PATCH RFC 1/3] spi: Allow SPI controller override device buswidth John Garry 2020-03-02 16:12 ` Geert Uytterhoeven 2020-03-02 16:33 ` Mark Brown [not found] ` <1582903131-160033-2-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2020-02-28 18:25 ` Mark Brown [this message] 2020-03-01 10:04 ` Sergei Shtylyov 2020-03-02 9:30 ` John Garry [not found] ` <07bb2213-5543-0ef0-9585-be83026c1199-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2020-03-02 12:22 ` Mark Brown 2020-03-02 18:51 ` Geert Uytterhoeven [not found] ` <CAMuHMdW7Xu6EzfmVFx1+i1byy3KOS5A+h2GuMb8nkZ+-jD1=BA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2020-03-03 9:42 ` John Garry [not found] ` <f6f21e75-7cee-89da-bb87-95327a4ec2cc-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2020-03-03 12:43 ` Mark Brown [not found] ` <1582903131-160033-1-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2020-02-28 15:18 ` [PATCH RFC 2/3] spi: HiSilicon v3xx: Properly set CMD_CONFIG for Dual/Quad modes John Garry [not found] ` <1582903131-160033-3-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2020-02-28 18:25 ` Applied "spi: HiSilicon v3xx: Properly set CMD_CONFIG for Dual/Quad modes" to the spi tree Mark Brown 2020-02-28 15:18 ` [PATCH RFC 3/3] spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bits John Garry [not found] ` <1582903131-160033-4-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> 2020-02-28 16:20 ` Mark Brown [not found] ` <20200228162057.GC4956-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2020-02-28 17:17 ` John Garry 2020-02-28 18:25 ` Applied "spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bits" to the spi tree Mark Brown
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