From: "Nandan, Apurva" <a-nandan@ti.com>
To: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>
Subject: Re: [PATCH v2 2/2] spi: cadence-quadspi: Fix check condition for DTR ops
Date: Wed, 21 Jul 2021 20:23:30 +0530 [thread overview]
Message-ID: <c6bb03ff-1192-5276-4034-4a021e4f6923@ti.com> (raw)
In-Reply-To: <20210716232504.182-3-a-nandan@ti.com>
On 17-Jul-21 4:55 AM, Apurva Nandan wrote:
> buswidth and dtr fields in spi_mem_op are only valid when the
> corresponding spi_mem_op phase has a non-zero length. For example,
> SPI NAND core doesn't set buswidth when using SPI_MEM_OP_NO_ADDR
> phase.
>
> Fix the dtr checks in set_protocol() and suppports_mem_op() to
> ignore empty spi_mem_op phases, as checking for dtr field in
> empty phase will result in false negatives.
>
> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
> ---
> drivers/spi/spi-cadence-quadspi.c | 21 ++++++++++++++++++---
> 1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index a2de23516553..1cec1c179a94 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -325,7 +325,15 @@ static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,
> f_pdata->inst_width = CQSPI_INST_TYPE_SINGLE;
> f_pdata->addr_width = CQSPI_INST_TYPE_SINGLE;
> f_pdata->data_width = CQSPI_INST_TYPE_SINGLE;
> - f_pdata->dtr = op->data.dtr && op->cmd.dtr && op->addr.dtr;
> +
> + /*
> + * For an op to be DTR, cmd phase along with every other non-empty
> + * phase should have dtr field set to 1. If an op phase has zero
> + * nbytes, ignore its dtr field; otherwise, check its dtr field.
> + */
> + f_pdata->dtr = op->cmd.dtr &&
> + (!op->addr.nbytes || op->addr.dtr) &&
> + (!op->data.nbytes || op->data.dtr);
>
> switch (op->data.buswidth) {
> case 0:
> @@ -1228,8 +1236,15 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem,
> {
> bool all_true, all_false;
>
> - all_true = op->cmd.dtr && op->addr.dtr && op->dummy.dtr &&
> - op->data.dtr;
> + /*
> + * op->dummy.dtr is required for converting nbytes into ncycles.
> + * Also, don't check the dtr field of the op phase having zero nbytes.
> + */
> + all_true = op->cmd.dtr &&
> + (!op->addr.nbytes || op->addr.dtr) &&
> + (!op->dummy.nbytes || op->dummy.dtr) &&
> + (!op->data.nbytes || op->data.dtr);
> +
> all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr &&
> !op->data.dtr;
>
>
Hi Mark,
Could you please have a look, I fixed the comments as you suggested.
Thanks and regards,
Apurva Nandan
next prev parent reply other threads:[~2021-07-21 14:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-16 23:25 [PATCH v2 0/2] spi: cadence-quadspi: Fix DTR op checks and timeout in SPI NAND write operations Apurva Nandan
2021-07-16 23:25 ` [PATCH v2 1/2] spi: cadence-quadspi: Disable Auto-HW polling Apurva Nandan
2021-07-16 23:25 ` [PATCH v2 2/2] spi: cadence-quadspi: Fix check condition for DTR ops Apurva Nandan
2021-07-21 14:53 ` Nandan, Apurva [this message]
2021-07-21 16:36 ` Mark Brown
2021-08-06 0:47 ` (subset) [PATCH v2 0/2] spi: cadence-quadspi: Fix DTR op checks and timeout in SPI NAND write operations Mark Brown
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