From: Dilip Kota <eswara.kota@linux.intel.com>
To: broonie@kernel.org, robh@kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, daniel.schwierzeck@gmail.com,
hauke@hauke-m.de, andriy.shevchenko@intel.com,
cheol.yong.kim@intel.com, chuanhua.lei@linux.intel.com,
qi-ming.wu@intel.com, Dilip Kota <eswara.kota@linux.intel.com>
Subject: [PATCH v2 3/8] spi: lantiq: Move interrupt control register offesets to SoC specific data structure
Date: Fri, 17 Jul 2020 14:27:52 +0800 [thread overview]
Message-ID: <f0f9723a30ea9c2ee48d2199f7512af9e15803b0.1594957019.git.eswara.kota@linux.intel.com> (raw)
In-Reply-To: <efb650b0faa49a00788c4e0ca8ef7196bdba851d.1594957019.git.eswara.kota@linux.intel.com>
In-Reply-To: <efb650b0faa49a00788c4e0ca8ef7196bdba851d.1594957019.git.eswara.kota@linux.intel.com>
Address of Interrupt control registers are different on new chipsets.
So move them to SoC specific data structure.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
---
drivers/spi/spi-lantiq-ssc.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-lantiq-ssc.c b/drivers/spi/spi-lantiq-ssc.c
index 1073a70a4beba..98e1c5d807597 100644
--- a/drivers/spi/spi-lantiq-ssc.c
+++ b/drivers/spi/spi-lantiq-ssc.c
@@ -50,8 +50,6 @@
#define LTQ_SPI_RXCNT 0x84
#define LTQ_SPI_DMACON 0xec
#define LTQ_SPI_IRNEN 0xf4
-#define LTQ_SPI_IRNICR 0xf8
-#define LTQ_SPI_IRNCR 0xfc
#define LTQ_SPI_CLC_SMC_S 16 /* Clock divider for sleep mode */
#define LTQ_SPI_CLC_SMC_M (0xFF << LTQ_SPI_CLC_SMC_S)
@@ -159,8 +157,10 @@
#define LTQ_SPI_IRNEN_ALL 0x1F
struct lantiq_ssc_hwcfg {
- unsigned int irnen_r;
- unsigned int irnen_t;
+ unsigned int irnen_r;
+ unsigned int irnen_t;
+ unsigned int irncr;
+ unsigned int irnicr;
};
struct lantiq_ssc_spi {
@@ -793,13 +793,17 @@ static int lantiq_ssc_transfer_one(struct spi_master *master,
}
static const struct lantiq_ssc_hwcfg lantiq_ssc_xway = {
- .irnen_r = LTQ_SPI_IRNEN_R_XWAY,
- .irnen_t = LTQ_SPI_IRNEN_T_XWAY,
+ .irnen_r = LTQ_SPI_IRNEN_R_XWAY,
+ .irnen_t = LTQ_SPI_IRNEN_T_XWAY,
+ .irnicr = 0xF8,
+ .irncr = 0xFC,
};
static const struct lantiq_ssc_hwcfg lantiq_ssc_xrx = {
- .irnen_r = LTQ_SPI_IRNEN_R_XRX,
- .irnen_t = LTQ_SPI_IRNEN_T_XRX,
+ .irnen_r = LTQ_SPI_IRNEN_R_XRX,
+ .irnen_t = LTQ_SPI_IRNEN_T_XRX,
+ .irnicr = 0xF8,
+ .irncr = 0xFC,
};
static const struct of_device_id lantiq_ssc_match[] = {
--
2.11.0
next prev parent reply other threads:[~2020-07-17 6:30 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 6:27 [PATCH v2 1/8] spi: lantiq: fix: Rx overflow error in full duplex mode Dilip Kota
2020-07-17 6:27 ` [PATCH v2 2/8] spi: lantiq: Add SMP support Dilip Kota
2020-07-17 6:27 ` Dilip Kota [this message]
2020-07-17 6:27 ` [PATCH v2 4/8] spi: lantiq: Add support to acknowledge interrupt Dilip Kota
2020-07-17 6:27 ` [PATCH v2 5/8] spi: lantiq: Add fifo size bit mask in SoC specific data structure Dilip Kota
2020-07-17 6:27 ` [PATCH v2 6/8] spi: lantiq: Move interrupt configuration to " Dilip Kota
2020-07-17 6:27 ` [PATCH v2 7/8] dt-bindings: spi: Add support to Lightning Mountain SoC Dilip Kota
2020-07-17 6:27 ` [PATCH v2 8/8] spi: lantiq: " Dilip Kota
2020-07-22 13:45 ` [PATCH v2 1/8] spi: lantiq: fix: Rx overflow error in full duplex mode Mark Brown
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