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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: linux-staging@lists.linux.dev
Cc: gregkh@linuxfoundation.org, neil@brown.name
Subject: [PATCH v2 2/6] staging: mt7621-pci: remove 'RALINK_PCI_BAR0SETUP_ADDR' definition
Date: Sun,  6 Jun 2021 18:13:54 +0200	[thread overview]
Message-ID: <20210606161358.7114-3-sergio.paracuellos@gmail.com> (raw)
In-Reply-To: <20210606161358.7114-1-sergio.paracuellos@gmail.com>

Instead of define RALINK_PCI_BAR0SETUP_ADDR just use standard
pci defnition for this which is 'PCI_BASE_ADDRESS_0'.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-pci/pci-mt7621.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index c14fc48e74fc..b83c338a2e3d 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -47,7 +47,6 @@
 #define MT7621_PCIE_OFFSET		0x2000
 #define MT7621_NEXT_PORT		0x1000
 
-#define RALINK_PCI_BAR0SETUP_ADDR	0x0010
 #define RALINK_PCI_ID			0x0030
 #define RALINK_PCI_CLASS		0x0034
 #define RALINK_PCI_SUBID		0x0038
@@ -494,7 +493,7 @@ static void mt7621_pcie_enable_port(struct mt7621_pcie_port *port)
 
 	/* map 2G DDR region */
 	pcie_write(pcie, PCIE_BAR_MAP_MAX | PCIE_BAR_ENABLE,
-		   offset + RALINK_PCI_BAR0SETUP_ADDR);
+		   offset + PCI_BASE_ADDRESS_0);
 
 	/* configure class code and revision ID */
 	pcie_write(pcie, PCIE_CLASS_CODE | PCIE_REVISION_ID,
-- 
2.25.1


  parent reply	other threads:[~2021-06-06 16:14 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-06 16:13 [PATCH v2 0/6] staging: mt7621-pci: some required changes after first review Sergio Paracuellos
2021-06-06 16:13 ` [PATCH v2 1/6] staging: mt7621-pci: make cleaner 'mt7621_pcie_enable_ports' Sergio Paracuellos
2021-06-06 16:13 ` Sergio Paracuellos [this message]
2021-06-06 16:13 ` [PATCH v2 3/6] staging: mt7621-pci: use {readl|writel}_relaxed instead of readl/writel Sergio Paracuellos
2021-06-06 16:13 ` [PATCH v2 4/6] staging: mt7621-dts: move some properties into root port child nodes Sergio Paracuellos
2021-06-06 16:13 ` [PATCH v2 5/6] staging: mt7621-pci: parse some dt properties from " Sergio Paracuellos
2021-06-06 16:13 ` [PATCH v2 6/6] staging: mt7621-pci: make use of 'pcie_port_write' Sergio Paracuellos

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