From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oi1-f180.google.com (mail-oi1-f180.google.com [209.85.167.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00A8972 for ; Thu, 23 Sep 2021 21:09:37 +0000 (UTC) Received: by mail-oi1-f180.google.com with SMTP id u22so11580889oie.5 for ; Thu, 23 Sep 2021 14:09:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=ECAcJQ5j3b9V37w+5AU1dCjJzeuc06UOkYf0x/TJhHI=; b=pnx068x7ie2eBHJzGo9KZ88EkrqAlgpautZL8dO8+pLjlR7EwuOXHxP5EunSc6wVGm enCjtdAmZ51oV0j0CLOjwPTQgmbnGJH/LNTWKArYq+/2H3gJdw25UUlb2GnmVKwZ6as2 EJJXw2aM1IDQnkHyyPEPc7NmPkuRkWWb8aAJ3y2vRTCOu0IHiH8VqW+SYl5smJHBUP9d xpb7cV0BiOIHHu/Yl3ro7XH0nw6KrrnV4geN2FhK9BhycHY3LsWTYn0+8q/Qjjy0svKn QK06U+BNoa2nOZf6THGfVix+G9yzlVICCqwkQGtmMUtoid+43tFDgUb5wnppZBpvcdlS ZJGg== X-Gm-Message-State: AOAM531HGhfTS3ZSibFRdVxHFcSd9m9u/kmFKry7gTPb5fVYHCkoBj/P rJF3UvuUViY2PH/sm4iolA== X-Google-Smtp-Source: ABdhPJxgGB/F5m/HUdgfquhEQY/6qPe41K4exPARMH+1jXMEbOmyXEtt37OEluaLbFS8sOex0LCyaQ== X-Received: by 2002:aca:645:: with SMTP id 66mr5369149oig.145.1632431377021; Thu, 23 Sep 2021 14:09:37 -0700 (PDT) Received: from robh.at.kernel.org (66-90-148-213.dyn.grandenetworks.net. [66.90.148.213]) by smtp.gmail.com with ESMTPSA id d10sm1701331ooj.24.2021.09.23.14.09.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Sep 2021 14:09:36 -0700 (PDT) Received: (nullmailer pid 3527425 invoked by uid 1000); Thu, 23 Sep 2021 21:09:34 -0000 Date: Thu, 23 Sep 2021 16:09:34 -0500 From: Rob Herring To: Dmitry Osipenko Cc: linux-pm@vger.kernel.org, linux-mmc@vger.kernel.org, Lucas Stach , Ulf Hansson , Mikko Perttunen , linux-kernel@vger.kernel.org, Peter Chen , Mark Brown , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , David Heidelberg , Jonathan Hunter , Rob Herring , Stephen Boyd , linux-tegra@vger.kernel.org, Richard Weinberger , Miquel Raynal , linux-usb@vger.kernel.org, linux-clk@vger.kernel.org, Mauro Carvalho Chehab , Michael Turquette , Nishanth Menon , linux-pwm@vger.kernel.org, linux-staging@lists.linux.dev, Stefan Agner , Vignesh Raghavendra , Viresh Kumar , dri-devel@lists.freedesktop.org, Thierry Reding , Peter De Schrijver , devicetree@vger.kernel.org, Lee Jones , Adrian Hunter Subject: Re: [PATCH v12 05/35] dt-bindings: clock: tegra-car: Document new clock sub-nodes Message-ID: References: <20210920181145.19543-1-digetx@gmail.com> <20210920181145.19543-6-digetx@gmail.com> Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210920181145.19543-6-digetx@gmail.com> On Mon, 20 Sep 2021 21:11:15 +0300, Dmitry Osipenko wrote: > Document sub-nodes which describe Tegra SoC clocks that require a higher > voltage of the core power domain in order to operate properly on a higher > clock rates. Each node contains a phandle to OPP table and power domain. > > The root PLLs and system clocks don't have any specific device dedicated > to them, clock controller is in charge of managing power for them. > > Signed-off-by: Dmitry Osipenko > --- > .../bindings/clock/nvidia,tegra20-car.yaml | 37 +++++++++++++++++++ > 1 file changed, 37 insertions(+) > Reviewed-by: Rob Herring