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From: guoren@kernel.org
To: guoren@kernel.org, anup.patel@wdc.com, palmerdabbelt@google.com,
	arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
	drew@beagleboard.org, liush@allwinnertech.com,
	lazyparser@gmail.com, wefu@redhat.com
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, linux-sunxi@lists.linux.dev,
	Guo Ren <guoren@linux.alibaba.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Palmer Dabbelt <palmer@dabbelt.com>
Subject: [RFC PATCH v2 05/11] riscv: pgtable: Add custom protection_map init
Date: Sun,  6 Jun 2021 09:04:03 +0000	[thread overview]
Message-ID: <1622970249-50770-9-git-send-email-guoren@kernel.org> (raw)
In-Reply-To: <1622970249-50770-1-git-send-email-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

Some RISC-V CPU vendors have defined their own PTE attributes to
solve non-coherent DMA bus problems. That makes _P/SXXX definitions
contain global variables which could be initialized at the early
boot stage before setup_vm.

This patch is similar to 316d097c4cd4  (x86/pti: Filter at
vma->vm_page_prot population) which give a choice for arch custom
implementation.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
---
 arch/riscv/Kconfig   |  4 ++++
 arch/riscv/mm/init.c | 22 ++++++++++++++++++++++
 mm/mmap.c            |  4 ++++
 3 files changed, 30 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c5914e7..05c4976 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -25,6 +25,7 @@ config RISCV
 	select ARCH_HAS_GIGANTIC_PAGE
 	select ARCH_HAS_KCOV
 	select ARCH_HAS_MMIOWB
+	select ARCH_HAS_PROTECTION_MAP_INIT
 	select ARCH_HAS_PTE_SPECIAL
 	select ARCH_HAS_SET_DIRECT_MAP
 	select ARCH_HAS_SET_MEMORY
@@ -198,6 +199,9 @@ config GENERIC_HWEIGHT
 config FIX_EARLYCON_MEM
 	def_bool MMU
 
+config ARCH_HAS_PROTECTION_MAP_INIT
+	def_bool y
+
 config PGTABLE_LEVELS
 	int
 	default 3 if 64BIT
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 4faf8bd..4b398c6 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -496,6 +496,26 @@ static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size)
 }
 #endif
 
+static void __init setup_protection_map(void)
+{
+	protection_map[0]  = __P000;
+	protection_map[1]  = __P001;
+	protection_map[2]  = __P010;
+	protection_map[3]  = __P011;
+	protection_map[4]  = __P100;
+	protection_map[5]  = __P101;
+	protection_map[6]  = __P110;
+	protection_map[7]  = __P111;
+	protection_map[8]  = __S000;
+	protection_map[9]  = __S001;
+	protection_map[10] = __S010;
+	protection_map[11] = __S011;
+	protection_map[12] = __S100;
+	protection_map[13] = __S101;
+	protection_map[14] = __S110;
+	protection_map[15] = __S111;
+}
+
 asmlinkage void __init setup_vm(uintptr_t dtb_pa)
 {
 	uintptr_t __maybe_unused pa;
@@ -504,6 +524,8 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
 	pmd_t fix_bmap_spmd, fix_bmap_epmd;
 #endif
 
+	setup_protection_map();
+
 #ifdef CONFIG_XIP_KERNEL
 	xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
 	xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
diff --git a/mm/mmap.c b/mm/mmap.c
index 0584e54..0a86059 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -100,10 +100,14 @@ static void unmap_region(struct mm_struct *mm,
  *								w: (no) no
  *								x: (yes) yes
  */
+#ifdef CONFIG_ARCH_HAS_PROTECTION_MAP_INIT
+pgprot_t protection_map[16] __ro_after_init;
+#else
 pgprot_t protection_map[16] __ro_after_init = {
 	__P000, __P001, __P010, __P011, __P100, __P101, __P110, __P111,
 	__S000, __S001, __S010, __S011, __S100, __S101, __S110, __S111
 };
+#endif
 
 #ifndef CONFIG_ARCH_HAS_FILTER_PGPROT
 static inline pgprot_t arch_filter_pgprot(pgprot_t prot)
-- 
2.7.4


  parent reply	other threads:[~2021-06-06  9:05 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-06  9:03 [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1 guoren
2021-06-06  9:03 ` [RFC PATCH v2 01/11] riscv: asid: Use global mappings for kernel pages guoren
2021-06-06  9:03 ` [PATCH V5 1/3] riscv: " guoren
2021-06-06  9:03 ` [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods guoren
2021-06-06 14:38   ` Christoph Hellwig
2021-06-06  9:03 ` [RFC PATCH v2 02/11] riscv: asid: " guoren
2021-06-06  9:04 ` [RFC PATCH v2 03/11] riscv: asid: Optimize tlbflush coding convention guoren
2021-06-06  9:04 ` [PATCH V5 3/3] riscv: tlbflush: Optimize " guoren
2021-06-06  9:04 ` [RFC PATCH v2 04/11] riscv: pgtable: Fixup _PAGE_CHG_MASK usage guoren
2021-06-06  9:04 ` guoren [this message]
2021-06-06  9:04 ` [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes guoren
2021-06-06 14:39   ` Christoph Hellwig
2021-06-06 15:08     ` Guo Ren
2021-06-06 17:22   ` Nick Kossifidis
2021-06-07  6:19     ` Christoph Hellwig
2021-06-06  9:04 ` [RFC PATCH v2 07/11] riscv: cmo: Add dma-noncoherency support guoren
2021-06-06  9:04 ` [RFC PATCH v2 08/11] riscv: cmo: Add vendor custom icache sync guoren
2021-06-06  9:04 ` [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board guoren
2021-06-06 16:26   ` Jernej Škrabec
2021-06-06 17:05     ` Guo Ren
2021-06-07  3:44     ` Guo Ren
2021-06-07  7:27       ` Maxime Ripard
2021-06-07  7:53         ` Guo Ren
2021-06-07  7:24   ` Maxime Ripard
2021-06-07  8:07     ` Guo Ren
2021-06-14 15:33       ` Maxime Ripard
2021-06-14 16:28         ` Guo Ren
2021-06-14 16:31           ` Jernej Škrabec
2021-06-06  9:04 ` [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option guoren
2021-06-07  7:19   ` Maxime Ripard
2021-06-07  7:27     ` Arnd Bergmann
2021-06-07  7:45       ` Guo Ren
2021-06-07  7:43     ` Guo Ren
2021-06-07 12:12       ` Maxime Ripard
2021-06-07 12:39         ` Guo Ren
2021-06-06  9:04 ` [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use guoren
2021-06-06 10:50   ` Andre Przywara
2021-06-06 15:32     ` Guo Ren
2021-06-06 15:39       ` Jernej Škrabec
2021-06-06 15:41         ` Guo Ren
2021-06-06 16:16   ` Arnd Bergmann
2021-06-06 16:32     ` Jernej Škrabec
2021-06-06 16:53       ` Guo Ren
2021-06-06 16:53     ` Guo Ren
2021-06-06 16:29 ` [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1 Jernej Škrabec
2021-06-06 16:54   ` Guo Ren
2021-06-06 17:14     ` Jernej Škrabec
2021-06-06 23:42       ` Guo Ren
2021-06-07  3:44 ` Anup Patel
2021-06-07  4:36   ` Guo Ren

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