From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.manjaro.org (mail.manjaro.org [176.9.38.148]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EE4D2FAE for ; Fri, 14 May 2021 13:42:44 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by mail.manjaro.org (Postfix) with ESMTP id C4B47220A62; Fri, 14 May 2021 15:42:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at manjaro.org Received: from mail.manjaro.org ([127.0.0.1]) by localhost (manjaro.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YXMWuC8QmCu1; Fri, 14 May 2021 15:42:34 +0200 (CEST) From: Tobias Schramm To: =?UTF-8?q?Jernej=20=C5=A0krabec?= , Rob Herring , devicetree@vger.kernel.org Cc: Maxime Ripard , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Tobias Schramm Subject: [PATCH v3 1/7] ARM: dts: sun8i: v3s: add DMA controller to v3s dts Date: Fri, 14 May 2021 15:43:59 +0200 Message-Id: <20210514134405.2097464-2-t.schramm@manjaro.org> In-Reply-To: <20210514134405.2097464-1-t.schramm@manjaro.org> References: <20210514134405.2097464-1-t.schramm@manjaro.org> X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The Allwinner V3s and V3 feature a DMA controller. This commit adds it to the V3s dtsi. Signed-off-by: Tobias Schramm --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index eb4cb63fef13..f0296ab46137 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -1,5 +1,6 @@ /* * Copyright (C) 2016 Icenowy Zheng + * Copyright (C) 2021 Tobias Schramm * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -172,6 +173,15 @@ nmi_intc: interrupt-controller@1c000d0 { interrupts = ; }; + dma: dma-controller@1c02000 { + compatible = "allwinner,sun8i-v3s-dma"; + reg = <0x01c02000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_DMA>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; + tcon0: lcd-controller@1c0c000 { compatible = "allwinner,sun8i-v3s-tcon"; reg = <0x01c0c000 0x1000>; -- 2.31.1