From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from wnew3-smtp.messagingengine.com (wnew3-smtp.messagingengine.com [64.147.123.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4468729CA for ; Tue, 28 Sep 2021 08:03:45 +0000 (UTC) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailnew.west.internal (Postfix) with ESMTP id 098862B0146F; Tue, 28 Sep 2021 04:03:43 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Tue, 28 Sep 2021 04:03:45 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=Gebz/40zT+RiT UUUWaWiMLhZd+FwHe7fYQoeo7vkMek=; b=t9WhNWrIl5jFdMawjprxVELGu443e HXX46hFbuEY2Hf8PwYujgRQdN6TBk2odSNxf/j3ZYIxqsoVNTDr8qo9bpUW72jAd YxSxBpq3vMsDd9XiwdaTMKbq1VrqN+S/t/RzTIEqxrebZAdWgle3vr2zp3NaEDD3 EXA9OeRFaS2DYFCNj9bx6sK/L8CgyaUlblU6gqVF96vGZyvIdK0z+fbstwkihqII x0qIs83kD2ayuM6Ql8JpZBLaZMhGLa9wJuv9ilDpTJ/mu67CNWhpo+ZCWs2yJC0K XRdz9kz4zS0L4pfhTlWDRzwOyOEgMXmOjal3jZVVPFd0zLiwbuC8QZvRA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=Gebz/40zT+RiTUUUWaWiMLhZd+FwHe7fYQoeo7vkMek=; b=ZyezsCjj G/ScdXrnh6/8LuHY7lmJmGOMvqPJcLpi9hIvycADHrSHddcWQnDajdh9qTWyexkd TMGfmmERwqhnj4SWefcmaS7ynH7bzF18JvkJJuJNqzEEq+BVFdvY6yIdqEmgo9VN Ay6uxLeoK9RCHKsoV5z+EHDXHpicNkkRDIvaOA+9TBLLNC0skJbrYKwZ/jFkX/HB /0EPJsGIkI3FI/AepEitzffKuJWXvjVeizk2tm0WDpWfZWB3xvjYxwjT6wgBCLhg 7NvQITvIR5ZA1O8dF53M2r7O5OgVOjapkOXt3ti4SYLel0XRVvn+ct3KEjFgQaw3 xLyYMQwAs0qYTg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrudejledguddvfecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepudfhjeefvdfhgfefheetgffhieeigfefhefgvddvveefgeejheej vdfgjeehueeinecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 28 Sep 2021 04:03:43 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Rob Herring Cc: Michael Turquette , Stephen Boyd , Alessandro Zummo , Alexandre Belloni , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v2 3/9] clk: sunxi-ng: div: Add macro using CLK_HW_INIT_FW_NAME Date: Tue, 28 Sep 2021 03:03:29 -0500 Message-Id: <20210928080335.36706-4-samuel@sholland.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210928080335.36706-1-samuel@sholland.org> References: <20210928080335.36706-1-samuel@sholland.org> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To use the external clock references from the device tree, instead of hardcoded global names, parents should be referenced with .fw_name. Add a variant of the SUNXI_CCU_M_WITH_GATE initializer which does this. Signed-off-by: Samuel Holland --- Changes since v1: - None. drivers/clk/sunxi-ng/ccu_div.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h index 6682fde6043c..4f8c78a4665b 100644 --- a/drivers/clk/sunxi-ng/ccu_div.h +++ b/drivers/clk/sunxi-ng/ccu_div.h @@ -166,6 +166,20 @@ struct ccu_div { SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \ _mshift, _mwidth, 0, _flags) +#define SUNXI_CCU_M_FW_WITH_GATE(_struct, _name, _parent, _reg, \ + _mshift, _mwidth, _gate, _flags) \ + struct ccu_div _struct = { \ + .enable = _gate, \ + .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \ + .common = { \ + .reg = _reg, \ + .hw.init = CLK_HW_INIT_FW_NAME(_name, \ + _parent, \ + &ccu_div_ops, \ + _flags), \ + }, \ + } + static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw) { struct ccu_common *common = hw_to_ccu_common(hw); -- 2.31.1