From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E26347C for ; Tue, 30 Aug 2022 02:08:29 +0000 (UTC) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 0ED665C01C6; Mon, 29 Aug 2022 22:08:29 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Mon, 29 Aug 2022 22:08:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm2; t=1661825309; x=1661911709; bh=aq ERgIMNt16j+SVHZUcamE4zlhsBe0bcYHWFUyOTwKw=; b=VWBoq6yWkw5+41nvWS gslhd2UCl6nA5gZ0g9XNpFDCSgdYhobxIrmuKjtyz0qy17DY0Zp4swsla//wqDbl ylSrOUE23m/B7mCxduoGNq6wjbZk0nYrWcOO0SU263+YPm7s8s+1vxLrEnEO6mHI S14dOs4/Qxbsxgs2T8zWLr9P3thI0XRZDGZb63Ob3yaDUoVXPGy+N3iWXL7QRH06 jEr6UlmrjoTaR58LEsxor1uHOCgROgoLfunOLU2xRFX9npn+ghKu4TTVSFCBjnl9 wQJuX5CmpgVD5ST2LzryV4r7wN+VbgCXjr+6DBK3xiWa1mF/YOVyR4i79z1hXtc9 iZmA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; t=1661825309; x=1661911709; bh=aqERgIMNt16j+ SVHZUcamE4zlhsBe0bcYHWFUyOTwKw=; b=1VynNZDBXvRgC1E9/8dEzFjirj2bq j1Fg0hGu1ya+CjICj24ZMGWhqmdXofL+5mEWMazaKNlcc1d87juyD4YioyFdh1k/ GX7upmmiAz3A5UD2xLyahQ5dQxQSMsO367y7t0Fr6tl9lBj56pnRaRJDOQ+hMfhR EkRPBDLtRPtnP5JE0UnTS5bkv1rYRpt8zUbPyxFBYv0j9XoQCV0V2rHiTFcEW3fz DWeZq1KKRUmihF7/XqUiSLRMUnhdah1hNcavm12OuRzn+BVtl6tUU7qjKgserQHE g+Xb+e1K426Y6ZdNyofnEAXscMo+K6XGN8aNMqRmlz8cQTTFolYAiGosA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrvdekvddgheehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepudekteeuudehtdelteevgfduvddvjefhfedulefgudevgeeghefg udefiedtveetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 29 Aug 2022 22:08:28 -0400 (EDT) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec Cc: Samuel Holland , Gregory CLEMENT , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Yangtao Li Subject: [PATCH 2/3] arm64: dts: allwinner: a100: Add device node for DMA controller Date: Mon, 29 Aug 2022 21:08:23 -0500 Message-Id: <20220830020824.62288-3-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220830020824.62288-1-samuel@sholland.org> References: <20220830020824.62288-1-samuel@sholland.org> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Yangtao Li The A100 SoC has a DMA controller that supports 8 DMA channels to and from various peripherals. Add a device node for it. Signed-off-by: Yangtao Li Signed-off-by: Samuel Holland --- Changes in v1: - From previous submission: fixed off-by-one in dma-requests property arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 548539c93ab0..5453a3bb7d81 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -101,6 +101,18 @@ ccu: clock@3001000 { #reset-cells = <1>; }; + dma: dma-controller@3002000 { + compatible = "allwinner,sun50i-a100-dma"; + reg = <0x03002000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; + clock-names = "bus", "mbus"; + resets = <&ccu RST_BUS_DMA>; + dma-channels = <8>; + dma-requests = <52>; + #dma-cells = <1>; + }; + gic: interrupt-controller@3021000 { compatible = "arm,gic-400"; reg = <0x03021000 0x1000>, <0x03022000 0x2000>, -- 2.35.1