From: Andre Przywara <andre.przywara@arm.com>
To: Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Chen-Yu Tsai <wens@csie.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-phy@lists.infradead.org, linux-usb@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, Karl Kurbjun <karl.os@veroson.com>,
Icenowy Zheng <uwu@icenowy.me>
Subject: [PATCH v2 2/7] dt-bindings: phy: Add special clock for Allwinner H616 PHY
Date: Mon, 31 Oct 2022 11:13:53 +0000 [thread overview]
Message-ID: <20221031111358.3387297-3-andre.przywara@arm.com> (raw)
In-Reply-To: <20221031111358.3387297-1-andre.przywara@arm.com>
The USB PHY IP in the Allwinner H616 SoC requires a quirk that involves
some resources from port 2's PHY and HCI IP. In particular the PMU clock
for port 2 must be surely ungated before accessing the REG_HCI_PHY_CTL
register of port 2. To allow each USB port to be controlled
independently of port 2, we need a handle to that particular PMU clock
in the *PHY* node, as the HCI and PHY part might be handled by separate
drivers.
Add that clock to the requirements of the H616 PHY binding, so that a
PHY driver can apply the quirk in isolation, without requiring help from
port 2's HCI driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../phy/allwinner,sun8i-h3-usb-phy.yaml | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml
index 77539b4601c24..2df012d13655e 100644
--- a/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml
@@ -36,18 +36,22 @@ properties:
- const: pmu3
clocks:
+ minItems: 4
items:
- description: USB OTG PHY bus clock
- description: USB Host 0 PHY bus clock
- description: USB Host 1 PHY bus clock
- description: USB Host 2 PHY bus clock
+ - description: PMU clock for host port 2
clock-names:
+ minItems: 4
items:
- const: usb0_phy
- const: usb1_phy
- const: usb2_phy
- const: usb3_phy
+ - const: pmu2_clk
resets:
items:
@@ -96,6 +100,28 @@ required:
- resets
- reset-names
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun50i-h616-usb-phy
+ then:
+ properties:
+ clocks:
+ minItems: 5
+
+ clock-names:
+ minItems: 5
+ else:
+ properties:
+ clocks:
+ maxItems: 4
+
+ clock-names:
+ maxItems: 4
+
additionalProperties: false
examples:
--
2.25.1
next prev parent reply other threads:[~2022-10-31 11:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-31 11:13 [PATCH v2 0/7] arm64: sunxi: h616: Add USB support Andre Przywara
2022-10-31 11:13 ` [PATCH v2 1/7] dt-bindings: usb: Add H616 compatible string Andre Przywara
2022-10-31 11:13 ` Andre Przywara [this message]
2022-11-01 1:03 ` [PATCH v2 2/7] dt-bindings: phy: Add special clock for Allwinner H616 PHY Rob Herring
2022-11-05 7:45 ` Vinod Koul
2022-10-31 11:13 ` [PATCH v2 3/7] phy: sun4i-usb: Introduce port2 SIDDQ quirk Andre Przywara
2022-11-05 7:46 ` Vinod Koul
2022-10-31 11:13 ` [PATCH v2 4/7] phy: sun4i-usb: Add support for the H616 USB PHY Andre Przywara
2022-11-05 7:46 ` Vinod Koul
2022-10-31 11:13 ` [PATCH v2 5/7] arm64: dts: allwinner: h616: Add USB nodes Andre Przywara
2022-11-05 21:07 ` Jernej Škrabec
2022-10-31 11:13 ` [PATCH v2 6/7] arm64: dts: allwinner: h616: OrangePi Zero 2: " Andre Przywara
2022-11-05 21:13 ` Jernej Škrabec
2022-10-31 11:13 ` [PATCH v2 7/7] arm64: dts: allwinner: h616: X96 Mate: " Andre Przywara
2022-11-05 21:14 ` Jernej Škrabec
2022-11-07 19:09 ` [PATCH v2 0/7] arm64: sunxi: h616: Add USB support Jernej Škrabec
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