Re: [RFC PATCH 2/3] clk: sunxi-ng: Implement precalculated NKM rate selection

[Frank Oltmanns <frank@oltmanns.dev>]

On 2023-05-27 at 15:27:46 +0200, Frank Oltmanns <frank@oltmanns.dev> wrote:
[...]
> diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
> index 94d2a83992b2..9652f6df17bd 100644
> --- a/drivers/clk/sunxi-ng/ccu_nkm.c
> +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
[...]
> @@ -157,14 +205,18 @@ static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
>  	if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
>  		rate *= nkm->fixed_post_div;
>
> -	_nkm.min_n = nkm->n.min ?: 1;
> -	_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
> -	_nkm.min_k = nkm->k.min ?: 1;
> -	_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
> -	_nkm.min_m = 1;
> -	_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
> -
> -	ccu_nkm_find_best(parent_rate, rate, &_nkm);
> +	if (nkm->table.num)
> +		rate = ccu_nkm_find_best_precalc(*parent_rate, rate, &_nkm,

Ugh! s/*parent_rate/parent_rate/
Sorry! Thanks to intel kernel test robot for pointing it out:
https://lore.kernel.org/oe-kbuild-all/202305280405.bUAMrEtn-lkp@intel.com/

Cheers,
  Frank

> +						 &nkm->table);
> +	else {
> +		_nkm.min_n = nkm->n.min ?: 1;
> +		_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
> +		_nkm.min_k = nkm->k.min ?: 1;
> +		_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
> +		_nkm.min_m = 1;
> +		_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
> +		ccu_nkm_find_best(parent_rate, rate, &_nkm);
> +	}
>
>  	spin_lock_irqsave(nkm->common.lock, flags);
>
> diff --git a/drivers/clk/sunxi-ng/ccu_nkm.h b/drivers/clk/sunxi-ng/ccu_nkm.h
> index 6601defb3f38..fa5551724921 100644
> --- a/drivers/clk/sunxi-ng/ccu_nkm.h
> +++ b/drivers/clk/sunxi-ng/ccu_nkm.h
> @@ -12,6 +12,30 @@
>  #include "ccu_div.h"
>  #include "ccu_mult.h"
>
> +struct clk_nkm_combo {
> +	u8	n;
> +	u8	k;
> +	u8	m;
> +};
> +
> +/**
> + * struct clk_nkm_table - Table of all meaningful combinations for n, k, and m
> + *
> + * @num: Number of entries in the table
> + * @combos: Array of combos (of size num) that are supported by this clock.
> + *
> + * This table shall contain all meaningful combinations of n, k, and m. That
> + * means that combinations that result in the same clock rate shall only be
> + * listed once. For example, if both
> + * { .n = 1, .k = 2, .m = 2} and  { .n = 2, .k = 2, .m = 4}
> + * are valid values for n, k, and m, only one of them would be allowed because
> + * both result in a factor of 1.0.
> + */
> +struct clk_nkm_table {
> +	size_t			num;
> +	struct clk_nkm_combo	*combos;
> +};
> +
>  /*
>   * struct ccu_nkm - Definition of an N-K-M clock
>   *
> @@ -29,6 +53,8 @@ struct ccu_nkm {
>  	unsigned int		fixed_post_div;
>
>  	struct ccu_common	common;
> +
> +	struct clk_nkm_table	table;
>  };
>
>  #define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \