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From: Guo Ren <guoren@kernel.org>
To: Christoph Hellwig <hch@lst.de>
Cc: "Nick Kossifidis" <mick@ics.forth.gr>,
	"Drew Fustini" <drew@beagleboard.org>,
	"Anup Patel" <anup.patel@wdc.com>,
	"Palmer Dabbelt" <palmerdabbelt@google.com>,
	wefu@redhat.com, "Wei Wu (吴伟)" <lazyparser@gmail.com>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-arch <linux-arch@vger.kernel.org>,
	linux-sunxi@lists.linux.dev, "Guo Ren" <guoren@linux.alibaba.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Benjamin Koch" <snowball@c3pb.de>,
	"Matteo Croce" <mcroce@linux.microsoft.com>,
	"Wei Fu" <tekkamanninja@gmail.com>
Subject: Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
Date: Mon, 7 Jun 2021 14:41:14 +0800	[thread overview]
Message-ID: <CAJF2gTRZuER5YbTD=0xWLU0Np6eD8L_z3rZH0i_WXgENUD3nbQ@mail.gmail.com> (raw)
In-Reply-To: <20210607062701.GB24060@lst.de>

On Mon, Jun 7, 2021 at 2:27 PM Christoph Hellwig <hch@lst.de> wrote:
>
> On Mon, Jun 07, 2021 at 11:19:03AM +0800, Guo Ren wrote:
> > >From Linux non-coherency view, we need:
> >  - Non-cache + Strong Order PTE attributes to deal with drivers' DMA descriptors
> >  - Non-cache + weak order to deal with framebuffer drivers
> >  - CMO dma_sync to sync cache with DMA devices
>
> This is not strictly true.  At the very minimum you only need cache
> invalidation and writeback instructions.  For example early parisc
> CPUs and some m68knommu SOCs have no support for uncached areas at all,
> and Linux works.  But to be fair this is very painful and supports only
> very limited periphals.  So for modern full Linux support some uncahed
> memory is advisable.  But that doesn't have to be using PTE attributes.
> It could also be physical memory regions that are either totally fixed
Double/Triple the size of physical memory regions can't be accepted by
SOC vendors, because it wastes HW resources.
Some cost-down soc interconnects only have 32bit~34bit width of
physical address, are you sure you could force them to expand it? (I
can't)

> or somewhat dynamic.
How can HW implement with dynamic modifying PMA? What's the granularity?



-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

  reply	other threads:[~2021-06-07  6:41 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-19  5:04 [PATCH RFC 0/3] riscv: Add DMA_COHERENT support guoren
2021-05-19  5:04 ` [PATCH RFC 1/3] riscv: pgtable.h: Fixup _PAGE_CHG_MASK usage guoren
2021-05-19  5:04 ` [PATCH RFC 2/3] riscv: Add DMA_COHERENT for custom PTE attributes guoren
2021-05-19  5:04 ` [PATCH RFC 3/3] riscv: Add SYNC_DMA_FOR_CPU/DEVICE for DMA_COHERENT guoren
2021-05-19  6:32   ` Guo Ren
2021-05-19  5:20 ` [PATCH RFC 0/3] riscv: Add DMA_COHERENT support Christoph Hellwig
2021-05-19  5:48   ` Guo Ren
2021-05-19  5:55     ` Christoph Hellwig
2021-05-19  6:09       ` Guo Ren
2021-05-19  6:44     ` Drew Fustini
2021-05-19  6:53       ` Christoph Hellwig
2021-05-20  1:45         ` Guo Ren
2021-05-20  5:48           ` Christoph Hellwig
2021-06-06 18:14           ` Nick Kossifidis
2021-06-07  0:04             ` Guo Ren
2021-06-07  2:16               ` Nick Kossifidis
2021-06-07  3:19                 ` Guo Ren
2021-06-07  6:27                   ` Christoph Hellwig
2021-06-07  6:41                     ` Guo Ren [this message]
2021-06-07  6:51                       ` Christoph Hellwig
2021-06-07  7:46                         ` Guo Ren
2021-06-08 15:00                     ` David Laight
2021-06-08 15:32                       ` 'Christoph Hellwig'
2021-06-08 16:11                         ` David Laight
2021-06-07  8:35                   ` Nick Kossifidis
2021-06-09  3:28             ` Guo Ren
2021-06-09  6:05               ` Jisheng Zhang
2021-06-09  9:45               ` Nick Kossifidis
2021-06-09 12:43                 ` Guo Ren
2021-05-19  6:05   ` Guo Ren
2021-05-19  6:06     ` Christoph Hellwig
2021-05-19  6:11       ` Guo Ren
2021-05-19  6:54       ` Drew Fustini
2021-05-19  6:56         ` Christoph Hellwig
2021-05-19  7:14         ` Anup Patel
2021-05-19  8:25           ` Damien Le Moal
2021-05-20  1:47           ` Guo Ren
2021-05-20  1:59             ` Guo Ren
2021-05-22  0:36           ` Guo Ren
2021-05-30  0:30             ` Palmer Dabbelt
2021-06-03  4:13               ` Palmer Dabbelt
2021-06-03  6:00                 ` Anup Patel
2021-06-03 15:39                   ` Palmer Dabbelt
2021-06-04  9:02                     ` David Laight
2021-06-04  9:53                     ` Arnd Bergmann
2021-06-04 14:47                       ` Guo Ren
2021-06-04 16:12                         ` Palmer Dabbelt
2021-06-04 21:26                           ` Arnd Bergmann
2021-06-04 22:10                             ` Palmer Dabbelt
2021-06-08 12:26                           ` Guo Ren
2021-06-06 17:11                   ` Guo Ren
2021-06-07  3:38                     ` Anup Patel
2021-06-07  4:22                       ` Guo Ren
2021-06-07  4:47                         ` Anup Patel
2021-06-07  5:08                           ` Guo Ren
2021-06-07  5:13                           ` Guo Ren

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