From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AAFC72 for ; Wed, 19 May 2021 06:12:02 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id 1E330613B4 for ; Wed, 19 May 2021 06:12:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1621404722; bh=aliJ2A5IaLQl1kaFJpcVaP8FxOlUquhNHY8hfbwV5oQ=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=G9DZR23da4IjsoJ/mtAo2AxCyf5GDW2IBuWal8rsvRSUyw0YGESWBWY9765O/zFUq OnqbcN7Xothn9+c0LxanS4KEHJFBdg7HNlH5a7rdHiMyBlCUh1DDhbKVBx2ZPl5z1T SPuWPJT/TmE2An9xwQXLbCq/JmtSIpzY2dTaSpllQnS2hujMM2i0xiKWOKGhum8cAE nde1rhH/lYw62U5AeKtUbRnV2sD44ZCQlwXr0e2I6VYgukoTamidjdhgzrnudauYJq zKyF21Fnyqd+NpIXsFzM0lCvqPJA8PaZOHLV+Mezrqm25c8acZlF3PHChGjmJjsBgX RoQPiT48pGerA== Received: by mail-lf1-f51.google.com with SMTP id i9so17281360lfe.13 for ; Tue, 18 May 2021 23:12:02 -0700 (PDT) X-Gm-Message-State: AOAM532HisI7Jr/evfU1e8FyIocjgFnOuIYxtd3EsoV21K8UpJd3OYOq 279SpDJbeT9BvUXd9bQALhMNd347+qD0ArBTvqo= X-Google-Smtp-Source: ABdhPJxlGj9xlx+dM6z1cg/1XfTAYuNHni/4fS0DrteOYCWlgF9XOUG9wrp/nkdsQ6fjglLfVBF0odXgygjFL2krD6E= X-Received: by 2002:ac2:5493:: with SMTP id t19mr7293363lfk.346.1621404720345; Tue, 18 May 2021 23:12:00 -0700 (PDT) X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <1621400656-25678-1-git-send-email-guoren@kernel.org> <20210519052048.GA24853@lst.de> <20210519060617.GA28397@lst.de> In-Reply-To: <20210519060617.GA28397@lst.de> From: Guo Ren Date: Wed, 19 May 2021 14:11:48 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support To: Christoph Hellwig Cc: Anup Patel , Palmer Dabbelt , drew@beagleboard.org, wefu@redhat.com, lazyparser@gmail.com, linux-riscv , Linux Kernel Mailing List , linux-arch , linux-sunxi@lists.linux.dev, Guo Ren Content-Type: text/plain; charset="UTF-8" On Wed, May 19, 2021 at 2:06 PM Christoph Hellwig wrote: > > On Wed, May 19, 2021 at 02:05:00PM +0800, Guo Ren wrote: > > Since the existing RISC-V ISA cannot solve this problem, it is better > > to provide some configuration for the SOC vendor to customize. > > We've been talking about this problem for close to five years. So no, > if you don't manage to get the feature into the ISA it can't be > supported. arch/riscv/errata/ is also defined in riscv ISA? -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/