Re: [PATCH v3 09/17] riscv: drivers: Convert xandespmu to use the vendor extension framework

From: Charlie Jenkins <charlie@rivosinc.com>
To: Conor Dooley <conor@kernel.org>
Cc: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Guo Ren" <guoren@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Shuah Khan" <shuah@kernel.org>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	"Palmer Dabbelt" <palmer@rivosinc.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v3 09/17] riscv: drivers: Convert xandespmu to use the vendor extension framework
Date: Fri, 26 Apr 2024 13:34:19 -0700	[thread overview]
Message-ID: <ZiwPyyBK2br8yKei@ghost> (raw)
In-Reply-To: <20240426-venue-maximum-f78ac451b146@spud>

On Fri, Apr 26, 2024 at 05:25:20PM +0100, Conor Dooley wrote:
> On Sat, Apr 20, 2024 at 06:04:41PM -0700, Charlie Jenkins wrote:
> > Migrate xandespmu out of riscv_isa_ext and into a new Andes-specific
> > vendor namespace.
> > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> > index 8cbe6e5f9c39..84760ce61e03 100644
> > --- a/drivers/perf/riscv_pmu_sbi.c
> > +++ b/drivers/perf/riscv_pmu_sbi.c
> > @@ -24,6 +24,8 @@
> >  #include <asm/errata_list.h>
> >  #include <asm/sbi.h>
> >  #include <asm/cpufeature.h>
> > +#include <asm/vendorid_list.h>
> > +#include <asm/vendor_extensions/andes.h>
> >  
> >  #define ALT_SBI_PMU_OVERFLOW(__ovl)					\
> >  asm volatile(ALTERNATIVE_2(						\
> > @@ -32,7 +34,7 @@ asm volatile(ALTERNATIVE_2(						\
> >  		THEAD_VENDOR_ID, ERRATA_THEAD_PMU,			\
> >  		CONFIG_ERRATA_THEAD_PMU,				\
> >  	"csrr %0, " __stringify(ANDES_CSR_SCOUNTEROF),			\
> > -		0, RISCV_ISA_EXT_XANDESPMU,				\
> > +		ANDES_VENDOR_ID, RISCV_ISA_VENDOR_EXT_XANDESPMU,	\
> >  		CONFIG_ANDES_CUSTOM_PMU)				\
> >  	: "=r" (__ovl) :						\
> >  	: "memory")
> > @@ -41,7 +43,7 @@ asm volatile(ALTERNATIVE_2(						\
> >  asm volatile(ALTERNATIVE(						\
> >  	"csrc " __stringify(CSR_IP) ", %0\n\t",				\
> >  	"csrc " __stringify(ANDES_CSR_SLIP) ", %0\n\t",			\
> > -		0, RISCV_ISA_EXT_XANDESPMU,				\
> > +		ANDES_VENDOR_ID, RISCV_ISA_VENDOR_EXT_XANDESPMU,	\
> >  		CONFIG_ANDES_CUSTOM_PMU)				\
> >  	: : "r"(__irq_mask)						\
> >  	: "memory")
> > @@ -837,7 +839,7 @@ static int pmu_sbi_setup_irqs(struct riscv_pmu *pmu, struct platform_device *pde
> >  		   riscv_cached_mimpid(0) == 0) {
> >  		riscv_pmu_irq_num = THEAD_C9XX_RV_IRQ_PMU;
> >  		riscv_pmu_use_irq = true;
> > -	} else if (riscv_isa_extension_available(NULL, XANDESPMU) &&
> > +	} else if (riscv_isa_vendor_extension_available(-1, XANDESPMU) &&
> 
> What's the rationale for this not using riscv_has_extension_unlikely()?
> Happens once in probe so don't bother? I forget if we discussed it when
> the code was added, but it would save us from the NULL/-1 syntax,
> neither of which I think is a good interface.

Doesn't look like something that was ever commented on in the series,
but I may have missed it. I can change this to use the alternatives.

This also wasn't supposed to be -1, it's supposed to be the id of the
vendor.

> 
> Also, I'd prob drop the "drivers" from $subject.
> 
> I'll come back and look at the rest of this Monday, it's a sunny Friday
> here and I've still got my devicetree patch queue to clear..
> 

- Charlie

> Cheers,
> Conor.
> 
> >  		   IS_ENABLED(CONFIG_ANDES_CUSTOM_PMU)) {
> >  		riscv_pmu_irq_num = ANDES_SLI_CAUSE_BASE + ANDES_RV_IRQ_PMOVI;
> >  		riscv_pmu_use_irq = true;
> > 
> > -- 
> > 2.44.0
> > 