On Wed, Sep 09, 2020 at 04:10:32PM +0800, JC Kuo wrote:
> As per Tegra210 TRM, before changing lane assignments, driver should
> keep lanes in IDDQ and sleep state; after changing lane assignments,
> driver should bring lanes out of IDDQ.
> This commit implements the required operations.
> 
> Signed-off-by: JC Kuo <jckuo@nvidia.com>
> ---
> v3:
>    add 'misc_ctl2' data member to UPHY lane for carrying MISC_PAD_PX_CTL2 offset
>    tegra210_uphy_lane_iddq_[enable/disable]() to access 'misc_ctl2' data member
>    
>  drivers/phy/tegra/xusb-tegra210.c | 82 ++++++++++++++++++++++++++++---
>  drivers/phy/tegra/xusb.c          |  6 +++
>  drivers/phy/tegra/xusb.h          |  6 +++
>  3 files changed, 86 insertions(+), 8 deletions(-)

Acked-by: Thierry Reding <treding@nvidia.com>