From: "Tamás Szűcs" <tszucs@protonmail.ch>
To: Rob Herring <robh+dt@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>, JC Kuo <jckuo@nvidia.com>,
Vidya Sagar <vidyas@nvidia.com>, Sameer Pujar <spujar@nvidia.com>,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: "Tamás Szűcs" <tszucs@protonmail.ch>
Subject: [PATCH v3 2/5] arm64: tegra: Specify sdhci clock parent for Tegra194 SDMMC1 and SDMMC3
Date: Wed, 14 Oct 2020 19:56:24 +0200 [thread overview]
Message-ID: <20201014175627.5585-3-tszucs@protonmail.ch> (raw)
In-Reply-To: <20201014175627.5585-1-tszucs@protonmail.ch>
Use PLLC4_MUXED as clock source for SDMMC1 and SDMMC3 core clocks. This enables
more suitable interface clocks for higher data rate modes.
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 058fdb1ffa1a..7e3ceeb5bc43 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -701,6 +701,9 @@
clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
clock-names = "sdhci", "tmclk";
+ assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
+ <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
+ assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
reset-names = "sdhci";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
@@ -739,6 +742,9 @@
clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
clock-names = "sdhci", "tmclk";
+ assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
+ <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
+ assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
reset-names = "sdhci";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
--
2.20.1
next prev parent reply other threads:[~2020-10-14 18:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-14 17:56 [PATCH v3 0/5] arm64: tegra: Xavier SDMMC changes Tamás Szűcs
2020-10-14 17:56 ` [PATCH v3 1/5] arm64: tegra: Enable signal voltage switching on Tegra194 SDMMC1 and SDMMC3 Tamás Szűcs
2020-10-14 17:56 ` Tamás Szűcs [this message]
2020-10-14 17:56 ` [PATCH v3 3/5] arm64: tegra: Fix CD on Jetson AGX Xavier SDMMC1 Tamás Szűcs
2020-10-14 17:56 ` [PATCH v3 4/5] arm64: tegra: Add vmmc-supply regulator for " Tamás Szűcs
2020-10-14 17:56 ` [PATCH v3 5/5] arm64: tegra: Configure SDIO cards on " Tamás Szűcs
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201014175627.5585-3-tszucs@protonmail.ch \
--to=tszucs@protonmail.ch \
--cc=devicetree@vger.kernel.org \
--cc=jckuo@nvidia.com \
--cc=jonathanh@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=spujar@nvidia.com \
--cc=thierry.reding@gmail.com \
--cc=vidyas@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).