From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Georgi Djakov <georgi.djakov@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Mikko Perttunen <cyndis@kapsi.fi>,
Viresh Kumar <vireshk@kernel.org>,
Peter Geis <pgwipeout@gmail.com>,
Nicolas Chauvet <kwizart@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: [PATCH v8 24/26] ARM: tegra: Add DVFS properties to Tegra20 EMC device-tree node
Date: Wed, 11 Nov 2020 04:14:54 +0300 [thread overview]
Message-ID: <20201111011456.7875-25-digetx@gmail.com> (raw)
In-Reply-To: <20201111011456.7875-1-digetx@gmail.com>
Add EMC OPP DVFS table that will be used for dynamic scaling of memory
frequency/voltage. Update board device-trees with optional EMC core supply
and remove unsupported OPPs.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
.../boot/dts/tegra20-acer-a500-picasso.dts | 7 ++
arch/arm/boot/dts/tegra20-colibri.dtsi | 4 +
arch/arm/boot/dts/tegra20-paz00.dts | 6 ++
.../arm/boot/dts/tegra20-peripherals-opp.dtsi | 92 +++++++++++++++++++
arch/arm/boot/dts/tegra20.dtsi | 3 +
5 files changed, 112 insertions(+)
create mode 100644 arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index a0b829738e8f..b4ed88802387 100644
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -1061,6 +1061,8 @@ map0 {
memory-controller@7000f400 {
nvidia,use-ram-code;
+ core-supply = <&vdd_core>;
+
emc-tables@0 {
nvidia,ram-code = <0>; /* elpida-8gb */
@@ -1450,3 +1452,8 @@ emc-table@300000 {
};
};
};
+
+&emc_icc_dvfs_opp_table {
+ /delete-node/ opp@666000000;
+ /delete-node/ opp@760000000;
+};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 6162d193e12c..585a5b441cf6 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -742,6 +742,10 @@ sound {
};
};
+&emc_icc_dvfs_opp_table {
+ /delete-node/ opp@760000000;
+};
+
&gpio {
lan-reset-n {
gpio-hog;
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index ada2bed8b1b5..52a81d888424 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -314,6 +314,8 @@ nvec@7000c500 {
memory-controller@7000f400 {
nvidia,use-ram-code;
+ core-supply = <&core_vdd_reg>;
+
emc-tables@0 {
nvidia,ram-code = <0x0>;
#address-cells = <1>;
@@ -662,3 +664,7 @@ cpu@1 {
};
};
};
+
+&emc_icc_dvfs_opp_table {
+ /delete-node/ opp@760000000;
+};
diff --git a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
new file mode 100644
index 000000000000..25b1ba73951e
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
+ compatible = "operating-points-v2";
+
+ opp@36000000 {
+ opp-microvolt = <950000 950000 1300000>;
+ opp-hz = /bits/ 64 <36000000>;
+ };
+
+ opp@47500000 {
+ opp-microvolt = <950000 950000 1300000>;
+ opp-hz = /bits/ 64 <47500000>;
+ };
+
+ opp@50000000 {
+ opp-microvolt = <950000 950000 1300000>;
+ opp-hz = /bits/ 64 <50000000>;
+ };
+
+ opp@54000000 {
+ opp-microvolt = <950000 950000 1300000>;
+ opp-hz = /bits/ 64 <54000000>;
+ };
+
+ opp@57000000 {
+ opp-microvolt = <950000 950000 1300000>;
+ opp-hz = /bits/ 64 <57000000>;
+ };
+
+ opp@100000000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <100000000>;
+ };
+
+ opp@108000000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <108000000>;
+ };
+
+ opp@126666000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <126666000>;
+ };
+
+ opp@150000000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <150000000>;
+ };
+
+ opp@190000000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <190000000>;
+ };
+
+ opp@216000000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <216000000>;
+ };
+
+ opp@300000000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <300000000>;
+ };
+
+ opp@333000000 {
+ opp-microvolt = <1000000 1000000 1300000>;
+ opp-hz = /bits/ 64 <333000000>;
+ };
+
+ opp@380000000 {
+ opp-microvolt = <1100000 1100000 1300000>;
+ opp-hz = /bits/ 64 <380000000>;
+ };
+
+ opp@600000000 {
+ opp-microvolt = <1200000 1200000 1300000>;
+ opp-hz = /bits/ 64 <600000000>;
+ };
+
+ opp@666000000 {
+ opp-microvolt = <1200000 1200000 1300000>;
+ opp-hz = /bits/ 64 <666000000>;
+ };
+
+ opp@760000000 {
+ opp-microvolt = <1300000 1300000 1300000>;
+ opp-hz = /bits/ 64 <760000000>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 8f8ad81916e7..6ce498178105 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -6,6 +6,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/tegra-pmc.h>
+#include "tegra20-peripherals-opp.dtsi"
+
/ {
compatible = "nvidia,tegra20";
interrupt-parent = <&lic>;
@@ -664,6 +666,7 @@ emc: memory-controller@7000f400 {
#size-cells = <0>;
#interconnect-cells = <0>;
+ operating-points-v2 = <&emc_icc_dvfs_opp_table>;
nvidia,memory-controller = <&mc>;
};
--
2.29.2
next prev parent reply other threads:[~2020-11-11 1:16 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-11 1:14 [PATCH v8 00/26] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 01/26] memory: tegra: Correct stub of devm_tegra_memory_controller_get() Dmitry Osipenko
2020-11-14 15:36 ` Krzysztof Kozlowski
2020-11-11 1:14 ` [PATCH v8 02/26] memory: tegra20-emc: Use dev_pm_opp_set_clkname() Dmitry Osipenko
2020-11-11 5:45 ` Viresh Kumar
2020-11-11 5:54 ` Viresh Kumar
2020-11-11 6:15 ` Dmitry Osipenko
2020-11-14 15:37 ` Krzysztof Kozlowski
2020-11-11 1:14 ` [PATCH v8 03/26] memory: tegra20-emc: Factor out clk initialization Dmitry Osipenko
2020-11-14 15:37 ` Krzysztof Kozlowski
2020-11-11 1:14 ` [PATCH v8 04/26] memory: tegra20-emc: Add devfreq support Dmitry Osipenko
2020-11-11 2:23 ` Chanwoo Choi
2020-11-14 15:38 ` Krzysztof Kozlowski
2020-11-11 1:14 ` [PATCH v8 05/26] memory: tegra20-emc: Remove IRQ number from error message Dmitry Osipenko
2020-11-14 15:38 ` Krzysztof Kozlowski
2020-11-11 1:14 ` [PATCH v8 06/26] memory: tegra30: Add FIFO sizes to memory clients Dmitry Osipenko
2020-11-14 15:39 ` Krzysztof Kozlowski
2020-11-11 1:14 ` [PATCH v8 07/26] memory: tegra30-emc: Make driver modular Dmitry Osipenko
2020-11-14 15:41 ` Krzysztof Kozlowski
2020-11-11 1:14 ` [PATCH v8 08/26] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-11-14 15:42 ` Krzysztof Kozlowski
2020-11-15 9:25 ` Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 09/26] memory: tegra30: Support interconnect framework Dmitry Osipenko
2020-11-11 5:53 ` Viresh Kumar
2020-11-11 6:14 ` Dmitry Osipenko
2020-11-11 6:18 ` Viresh Kumar
2020-11-11 7:32 ` Dmitry Osipenko
2020-11-11 7:54 ` Viresh Kumar
2020-11-11 14:08 ` Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 10/26] memory: tegra30-emc: Factor out clk initialization Dmitry Osipenko
2020-11-11 8:51 ` Krzysztof Kozlowski
2020-11-11 8:52 ` Krzysztof Kozlowski
2020-11-11 9:01 ` Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 11/26] memory: tegra124-emc: Make driver modular Dmitry Osipenko
2020-11-11 9:04 ` Krzysztof Kozlowski
2020-11-11 9:17 ` Dmitry Osipenko
2020-11-11 9:26 ` Krzysztof Kozlowski
2020-11-11 10:25 ` Dmitry Osipenko
2020-11-11 11:53 ` Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 12/26] memory: tegra124-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 13/26] memory: tegra124: Support interconnect framework Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 14/26] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 15/26] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 16/26] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 17/26] PM / devfreq: tegra30: Separate configurations per-SoC generation Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 18/26] PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 19/26] ARM: tegra: Correct EMC registers size in Tegra20 device-tree Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 20/26] ARM: tegra: Add interconnect properties to " Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 21/26] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 22/26] ARM: tegra: Add interconnect properties to Tegra124 device-tree Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 23/26] ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree Dmitry Osipenko
2020-11-11 1:14 ` Dmitry Osipenko [this message]
2020-11-11 1:14 ` [PATCH v8 25/26] ARM: tegra: Add DVFS properties to Tegra30 EMC and ACTMON device-tree nodes Dmitry Osipenko
2020-11-11 1:14 ` [PATCH v8 26/26] ARM: tegra: Add DVFS properties to Tegra124 " Dmitry Osipenko
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