From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6778AC47423 for ; Tue, 29 Sep 2020 18:02:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0D46221D46 for ; Tue, 29 Sep 2020 18:02:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="W80lX/ss" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728078AbgI2SCk (ORCPT ); Tue, 29 Sep 2020 14:02:40 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:12168 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727657AbgI2SCk (ORCPT ); Tue, 29 Sep 2020 14:02:40 -0400 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Tue, 29 Sep 2020 11:01:46 -0700 Received: from [10.26.75.44] (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 29 Sep 2020 18:02:19 +0000 Subject: Re: [PATCH v2 0/5] PCI: dwc: improve msi handling To: Marc Zyngier CC: Jisheng Zhang , Kunihiko Hayashi , Neil Armstrong , , Binghui Wang , "Bjorn Andersson" , Masahiro Yamada , Thierry Reding , , Vidya Sagar , Fabio Estevam , Jerome Brunet , Rob Herring , Jesper Nilsson , "Lorenzo Pieralisi" , Kevin Hilman , Pratyush Anand , , Krzysztof Kozlowski , Kishon Vijay Abraham I , Kukjin Kim , NXP Linux Team , Xiaowei Song , Richard Zhu , Martin Blumenstingl , , "Sascha Hauer" , Yue Wang , , Bjorn Helgaas , , , , Jingoo Han , Andy Gross , , "Stanimir Varbanov" , Pengutronix Kernel Team , Gustavo Pimentel , Shawn Guo , Lucas Stach References: <20200924190421.549cb8fc@xhacker.debian> <20200929184851.22682ff1@xhacker.debian> <8e06a370-a37a-5f33-b43b-2830adb31b3e@nvidia.com> From: Jon Hunter Message-ID: <6ead62a5-6ad5-bde8-a5df-93c0f8029f65@nvidia.com> Date: Tue, 29 Sep 2020 19:02:16 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1601402506; bh=DFFoTBk7ct8iktjKeMDlsj2Utbk2NKyQWxL2aKVjTaM=; h=Subject:To:CC:References:From:Message-ID:Date:User-Agent: MIME-Version:In-Reply-To:Content-Type:Content-Language: Content-Transfer-Encoding:X-Originating-IP:X-ClientProxiedBy; b=W80lX/ssDGSCkmOHGNX8qfEHRIGTVGbYctuQLU1uEcEjyE0fnkV9wz2g53gstJyUI E4spYYHmwagaxJa4TO8sL06dLbzRwQ2r0mAvKv53wUNqKGfxnV3JfaTodLW7VFp50E IzpjML0CTcNLrRF0t2KZ6sm6PRKfBBHHCK90MeJ/+oyhR43oJQMRzJKkRWKVKPfhQW DwViT05UxhiaQfRiAFkxUNBjLgzRTgqifdmv2KJ8qQd4RmhXR1HisAMmb9APrvJDe6 fdCnmmZWbJ3ZUiuMA9/5d7ErTB3BYY+MpqowblPmh6cWgZXddyMV73hexYShiBEboJ plJvT038Egg7Q== Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On 29/09/2020 18:25, Marc Zyngier wrote: > On 2020-09-29 14:22, Jon Hunter wrote: >> Hi Jisheng, >> >> On 29/09/2020 11:48, Jisheng Zhang wrote: >>> Hi Jon, >>> >>> On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote: >>> >>>> >>>> On 24/09/2020 12:05, Jisheng Zhang wrote: >>>>> Improve the msi code: >>>>> 1. Add proper error handling. >>>>> 2. Move dw_pcie_msi_init() from each users to designware host to solv= e >>>>> msi page leakage in resume path. >>>> >>>> Apologies if this is slightly off topic, but I have been meaning to as= k >>>> about MSIs and PCI. On Tegra194 which uses the DWC PCI driver, >>>> whenever we >>>> hotplug CPUs we see the following warnings ... >>>> >>>> =C2=A0[=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 79.068351] WARNING KERN IRQ70: s= et affinity failed(-22). >>>> =C2=A0[=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 79.068362] WARNING KERN IRQ71: s= et affinity failed(-22). >>>> >>> >>> I tried to reproduce this issue on Synaptics SoC, but can't reproduce >>> it. >>> Per my understanding of the code in kernel/irq/cpuhotplug.c, this >>> warning >>> happened when we migrate irqs away from the offline cpu, this implicitl= y >>> implies that before this point the irq has bind to the offline cpu, >>> but how >>> could this happen given current dw_pci_msi_set_affinity() implementatio= n >>> always return -EINVAL >> >> By default the smp_affinity should be set so that all CPUs can be >> interrupted ... >> >> $ cat /proc/irq/70/smp_affinity >> 0xff >> >> In my case there are 8 CPUs and so 0xff implies that the interrupt can >> be triggered on any of the 8 CPUs. >> >> Do you see the set_affinity callback being called for the DWC irqchip in >> migrate_one_irq()? >=20 > The problem is common to all MSI implementations that end up muxing > all the end-point MSIs into a single interrupt. With these systems, > you cannot set the affinity of individual MSIs (they don't target a > CPU, they target another interrupt... braindead). Only the mux > interrupt can have its affinity changed. >=20 > So returning -EINVAL is the right thing to do. Right, so if that is the case, then surely there should be some way to avoid these warnings because they are not relevant? Cheers Jon --=20 nvpublic