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Thu, 22 Jun 2023 07:24:14 -0400 (EDT) Date: Thu, 22 Jun 2023 13:24:12 +0200 From: Maxime Ripard To: Thierry Reding Cc: Stephen Boyd , Dmitry Osipenko , Michael Turquette , linux-clk@vger.kernel.org, Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , linux-tegra@vger.kernel.org Subject: Re: [PATCH v4 65/68] clk: tegra: super: Switch to determine_rate Message-ID: References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> <20221018-clk-range-checks-fixes-v4-65-971d5077e7d2@cerno.tech> <700c0c62-defd-01c1-3b1d-8a760dfa194f@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="gholgrwc3kzuoraf" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org --gholgrwc3kzuoraf Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Wed, Jun 21, 2023 at 05:35:09PM +0200, Thierry Reding wrote: > On Tue, Jun 20, 2023 at 12:09:09PM -0700, Stephen Boyd wrote: > > Quoting Maxime Ripard (2023-06-19 00:26:19) > > > On Mon, Jun 19, 2023 at 02:38:59AM +0300, Dmitry Osipenko wrote: > > > > 05.05.2023 14:26, Maxime Ripard =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > > > > >=20 > > > > > diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/cl= k-super.c > > > > > index 3f3a7a203c5f..7ec47942720c 100644 > > > > > --- a/drivers/clk/tegra/clk-super.c > > > > > +++ b/drivers/clk/tegra/clk-super.c > > > > > @@ -142,15 +142,22 @@ static const struct clk_ops tegra_clk_super= _mux_ops =3D { > > > > > .restore_context =3D clk_super_mux_restore_context, > > > > > }; > > > > > =20 > > > > > -static long clk_super_round_rate(struct clk_hw *hw, unsigned lon= g rate, > > > > > - unsigned long *parent_rate) > > > > > +static int clk_super_determine_rate(struct clk_hw *hw, > > > > > + struct clk_rate_request *req) > > > > > { > > > > > struct tegra_clk_super_mux *super =3D to_clk_super_mux(hw); > > > > > struct clk_hw *div_hw =3D &super->frac_div.hw; > > > > > + unsigned long rate; > > > > > =20 > > > > > __clk_hw_set_clk(div_hw, hw); > > > > > =20 > > > > > - return super->div_ops->round_rate(div_hw, rate, parent_rate); > > > > > + rate =3D super->div_ops->round_rate(div_hw, req->rate, > > > > > + &req->best_parent_rate); > > > > > + if (rate < 0) > >=20 > > There's the report that this condition is never possible. Maybe the > > previous code was relying on an error value sometimes. Can we add > > determine_rate to the div_ops and simplify this code? I asked on the > > list for that earlier. >=20 > I was able to reproduce this on a Tegra30 Beaver, but the problem is > more straightforward than this. The crash I was seeing during boot was > because cclk_super_determine_rate() was still calling the round_rate() > callback from tegra_clk_super_ops, which this patch removed (and added > determine_rate() instead). >=20 > The following fixes the problem for me. It's basically converting the > round_rate() call to an equivalent determine_rate() call. Thanks for figuring it out :) > Dmitry, can you verify that this fixes the issue that you were seeing? >=20 > Thierry >=20 > --- >8 --- > diff --git a/drivers/clk/tegra/clk-tegra-super-cclk.c b/drivers/clk/tegra= /clk-tegra-super-cclk.c > index 68d7bcd5fc8a..8a2bb4ae4fd2 100644 > --- a/drivers/clk/tegra/clk-tegra-super-cclk.c > +++ b/drivers/clk/tegra/clk-tegra-super-cclk.c > @@ -86,9 +86,16 @@ static int cclk_super_determine_rate(struct clk_hw *hw, > if (rate <=3D pllp_rate) { > if (super->flags & TEGRA20_SUPER_CLK) > rate =3D pllp_rate; > - else > - rate =3D tegra_clk_super_ops.round_rate(hw, rate, > - &pllp_rate); > + else { > + struct clk_rate_request parent =3D { > + .rate =3D req->rate, > + .best_parent_rate =3D pllp_rate, > + }; If it works and you submit a patch later, this needs to be changed to clk_hw_init_rate_request() Maxime --gholgrwc3kzuoraf Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCZJQvXAAKCRDj7w1vZxhR xTjxAP9ehs86l6sru4prW3L7eAyFmbShO1bdRkjCqNyQL7z5bAD6A012+Eo014am UvaiwGOrgvvMLCQzwa69Spo0j7liEws= =fuL3 -----END PGP SIGNATURE----- --gholgrwc3kzuoraf--