From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 460AFC433DF for ; Wed, 5 Aug 2020 09:30:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 31D822076E for ; Wed, 5 Aug 2020 09:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728170AbgHEJai (ORCPT ); Wed, 5 Aug 2020 05:30:38 -0400 Received: from mx2.suse.de ([195.135.220.15]:51906 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728103AbgHEJ3o (ORCPT ); Wed, 5 Aug 2020 05:29:44 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 4EA7DAC83; Wed, 5 Aug 2020 09:29:58 +0000 (UTC) Date: Wed, 05 Aug 2020 11:29:41 +0200 Message-ID: From: Takashi Iwai To: Mohan Kumar Cc: , , , , , , Subject: Re: [PATCH 2/3] ALSA: hda: Add behaviour flag for dma stop delay In-Reply-To: <20200805091116.2314-3-mkumard@nvidia.com> References: <20200805091116.2314-1-mkumard@nvidia.com> <20200805091116.2314-3-mkumard@nvidia.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 Emacs/25.3 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On Wed, 05 Aug 2020 11:11:15 +0200, Mohan Kumar wrote: > > Behaviour flag dma_stop_delay is added as a new member in hdac_bus > structure to avoid memory decode error incase DMA RUN bit is not > disabled in the given timeout from snd_hdac_stream_sync function and > followed by stream reset which results in memory decode error between > reset set and clear operation. The new field looks like not only a flag but also contains the actual delay time in usec. Please give a short comment at the struct field. thanks, Takashi > > Signed-off-by: Mohan Kumar > --- > include/sound/hdaudio.h | 2 ++ > sound/hda/hdac_stream.c | 7 +++++++ > 2 files changed, 9 insertions(+) > > diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h > index c1f78d9a6e47..cf77c6b83016 100644 > --- a/include/sound/hdaudio.h > +++ b/include/sound/hdaudio.h > @@ -347,6 +347,8 @@ struct hdac_bus { > > int bdl_pos_adj; /* BDL position adjustment */ > > + unsigned int dma_stop_delay; > + > /* locks */ > spinlock_t reg_lock; > struct mutex cmd_mutex; > diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c > index a38a2af1654f..abe7a1b16fe1 100644 > --- a/sound/hda/hdac_stream.c > +++ b/sound/hda/hdac_stream.c > @@ -150,9 +150,12 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) > { > unsigned char val; > int timeout; > + int dma_run_state; > > snd_hdac_stream_clear(azx_dev); > > + dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START; > + > snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET); > udelay(3); > timeout = 300; > @@ -162,6 +165,10 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) > if (val) > break; > } while (--timeout); > + > + if (azx_dev->bus->dma_stop_delay && dma_run_state) > + udelay(azx_dev->bus->dma_stop_delay); > + > val &= ~SD_CTL_STREAM_RESET; > snd_hdac_stream_writeb(azx_dev, SD_CTL, val); > udelay(3); > -- > 2.17.1 >