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From: JC Kuo <jckuo@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: <gregkh@linuxfoundation.org>, <robh@kernel.org>,
	<jonathanh@nvidia.com>, <kishon@ti.com>,
	<linux-tegra@vger.kernel.org>, <linux-usb@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<nkristam@nvidia.com>
Subject: Re: [PATCH v3 04/15] phy: tegra: xusb: tegra210: Do not reset UPHY PLL
Date: Wed, 14 Oct 2020 11:21:06 +0800
Message-ID: <0ec9045c-8722-d7cd-20f0-2c163be75619@nvidia.com> (raw)
In-Reply-To: <20200928130618.GE3065790@ulmo>

Asserting reset to a PLL when it's managed by hardware power sequencer would
break sequencer's state machine. Putting PLL in reset doesn't save some extra power.

Thanks for review.
JC

On 9/28/20 9:06 PM, Thierry Reding wrote:
> On Wed, Sep 09, 2020 at 04:10:30PM +0800, JC Kuo wrote:
>> Once UPHY PLL hardware power sequencer is enabled, do not assert
>> reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken.
>> This commit removes reset_control_assert(pcie->rst) and
>> reset_control_assert(sata->rst) from PEX/SATA UPHY disable procedure.
>>
>> Signed-off-by: JC Kuo <jckuo@nvidia.com>
>> ---
>> v3:
>>    new, was a part of "phy: tegra: xusb: Rearrange UPHY init on Tegra210"
>>
>>  drivers/phy/tegra/xusb-tegra210.c | 2 --
>>  1 file changed, 2 deletions(-)
>>
>> diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c
>> index f06e7bc7a51b..ef4bbcbed60b 100644
>> --- a/drivers/phy/tegra/xusb-tegra210.c
>> +++ b/drivers/phy/tegra/xusb-tegra210.c
>> @@ -504,7 +504,6 @@ static void tegra210_pex_uphy_disable(struct tegra_xusb_padctl *padctl)
>>  	if (--pcie->enable > 0)
>>  		goto unlock;
>>  
>> -	reset_control_assert(pcie->rst);
>>  	clk_disable_unprepare(pcie->pll);
>>  
>>  unlock:
>> @@ -746,7 +745,6 @@ static void tegra210_sata_uphy_disable(struct tegra_xusb_padctl *padctl)
>>  	if (--sata->enable > 0)
>>  		goto unlock;
>>  
>> -	reset_control_assert(sata->rst);
>>  	clk_disable_unprepare(sata->pll);
>>  
>>  unlock:
> 
> Does this mean that we can no longer reset these PLLs anymore? Is that
> safe? Would we ever need to reset them for recovery or similar? For
> power saving, is disabling the clock enough, or could we save some extra
> power by putting the PLLs into reset?
> 
> Thierry
> 

  reply index

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-09  8:10 [PATCH v3 00/15] Tegra XHCI controller ELPG support JC Kuo
2020-09-09  8:10 ` [PATCH v3 01/15] clk: tegra: Add PLLE HW power sequencer control JC Kuo
2020-09-28 12:51   ` Thierry Reding
2020-09-09  8:10 ` [PATCH v3 02/15] clk: tegra: Don't enable PLLE HW sequencer at init JC Kuo
2020-09-28 12:52   ` Thierry Reding
2020-09-09  8:10 ` [PATCH v3 03/15] phy: tegra: xusb: Move usb3 port init for Tegra210 JC Kuo
2020-09-28 13:03   ` Thierry Reding
2020-09-09  8:10 ` [PATCH v3 04/15] phy: tegra: xusb: tegra210: Do not reset UPHY PLL JC Kuo
2020-09-28 13:06   ` Thierry Reding
2020-10-14  3:21     ` JC Kuo [this message]
2020-09-09  8:10 ` [PATCH v3 05/15] phy: tegra: xusb: Rearrange UPHY init on Tegra210 JC Kuo
2020-09-28 13:08   ` Thierry Reding
2020-09-09  8:10 ` [PATCH v3 06/15] phy: tegra: xusb: Add Tegra210 lane_iddq operation JC Kuo
2020-09-28 13:10   ` Thierry Reding
2020-09-09  8:10 ` [PATCH v3 07/15] phy: tegra: xusb: Add sleepwalk and suspend/resume JC Kuo
2020-09-28 13:11   ` Thierry Reding
2020-09-09  8:10 ` [PATCH v3 08/15] soc/tegra: pmc: Provide usb sleepwalk register map JC Kuo
2020-09-28 13:17   ` Thierry Reding
2020-10-14  4:08     ` JC Kuo
2020-09-09  8:10 ` [PATCH v3 09/15] arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop JC Kuo
2020-09-28 13:18   ` Thierry Reding
2020-10-14  4:15     ` JC Kuo
2020-09-09  8:10 ` [PATCH v3 10/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra210 JC Kuo
2020-09-28 13:40   ` Thierry Reding
2020-10-14  8:37     ` JC Kuo
2020-09-09  8:10 ` [PATCH v3 11/15] phy: tegra: xusb: Tegra210 host mode VBUS control JC Kuo
2020-09-28 13:42   ` Thierry Reding
2020-09-09  8:10 ` [PATCH v3 12/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra186 JC Kuo
2020-09-28 13:50   ` Thierry Reding
2020-10-15  8:08     ` JC Kuo
2020-09-09  8:10 ` [PATCH v3 13/15] arm64: tegra210/tegra186/tegra194: XUSB PADCTL irq JC Kuo
2020-09-09  8:10 ` [PATCH v3 14/15] usb: host: xhci-tegra: Unlink power domain devices JC Kuo
2020-09-28 13:53   ` Thierry Reding
2020-10-15  8:09     ` JC Kuo
2020-09-09  8:10 ` [PATCH v3 15/15] xhci: tegra: Enable ELPG for runtime/system PM JC Kuo
2020-09-28 14:06   ` Thierry Reding
2020-10-15  8:12     ` JC Kuo
2020-09-28 12:54 ` [PATCH v3 00/15] Tegra XHCI controller ELPG support Thierry Reding
2020-10-14  2:26   ` JC Kuo

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